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Message-Id: <20241001024356.1096072-25-anshuman.khandual@arm.com>
Date: Tue, 1 Oct 2024 08:13:33 +0530
From: Anshuman Khandual <anshuman.khandual@....com>
To: linux-kernel@...r.kernel.org,
kvmarm@...ts.linux.dev,
linux-arm-kernel@...ts.infradead.org,
maz@...nel.org
Cc: Anshuman Khandual <anshuman.khandual@....com>,
Oliver Upton <oliver.upton@...ux.dev>,
James Morse <james.morse@....com>,
Suzuki K Poulose <suzuki.poulose@....com>,
Catalin Marinas <catalin.marinas@....com>,
Will Deacon <will@...nel.org>,
Mark Brown <broonie@...nel.org>
Subject: [PATCH 24/47] arm64/sysreg: Add register fields for PMICFILTR_EL0
This adds register fields for PMICFILTR_EL0 as per the definitions based
on DDI0601 2024-06.
Cc: Catalin Marinas <catalin.marinas@....com>
Cc: Will Deacon <will@...nel.org>
Cc: Mark Brown <broonie@...nel.org>
Cc: linux-arm-kernel@...ts.infradead.org
Cc: linux-kernel@...r.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@....com>
---
arch/arm64/tools/sysreg | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
index 4bf8ae6d8a26..300c213f39da 100644
--- a/arch/arm64/tools/sysreg
+++ b/arch/arm64/tools/sysreg
@@ -2492,6 +2492,27 @@ Sysreg PMICNTR_EL0 3 3 9 4 0
Field 63:0 ICNT
EndSysreg
+Sysreg PMICFILTR_EL0 3 3 9 6 0
+Res0 63:59
+Field 58 SYNC
+Field 57:56 VS
+Res0 55:32
+Field 31 P
+Field 30 U
+Field 29 NSK
+Field 28 NSU
+Field 27 NSH
+Field 26 M
+Res0 25
+Field 24 SH
+Field 23 T
+Field 22 RLK
+Field 21 RLU
+Field 20 RLH
+Res0 19:16
+Field 15:0 evtCount
+EndSysreg
+
SysregFields HFGxTR_EL2
Field 63 nAMAIR2_EL1
Field 62 nMAIR2_EL1
--
2.25.1
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