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Message-ID: <0e84f3c0-09d6-4485-ac76-ca296d1ee07e@os.amperecomputing.com>
Date: Tue, 1 Oct 2024 12:38:56 -0700
From: Yang Shi <yang@...amperecomputing.com>
To: Jason Gunthorpe <jgg@...pe.ca>
Cc: Nicolin Chen <nicolinc@...dia.com>, will@...nel.org,
robin.murphy@....com, linux-arm-kernel@...ts.infradead.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH] iommu/arm-smmu-v3: Fix L1 stream table index calculation
for AmpereOne
On 10/1/24 12:18 PM, Jason Gunthorpe wrote:
> On Tue, Oct 01, 2024 at 12:09:03PM -0700, Yang Shi wrote:
>>> Also, there are other places doing "1 << smmu->sid_bits", e.g.
>>> arm_smmu_init_strtab_linear().
>> The disassembly shows it uses "sbfiz x21, x20, 6, 32" instead of lsl. 1UL
>> should be used if we want to take extra caution and don't prefer rely on
>> compiler.
> Still, we should be fixing them all if sid_bits == 32, all those
> shifts should be throwing a UBSAN error. It would be crazy to have a
OK, will cover this is v2.
> 32 bit linear table but I guess it is allowed?
I'm not smmu expert, but if sid_bits is 32, it looks like the linear
table will consume 256GB IIUC? That is crazy.
>
> Jason
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