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Message-ID: <20241001080400.diqfgbkje77pjby7@vireshk-i7>
Date: Tue, 1 Oct 2024 13:34:00 +0530
From: Viresh Kumar <viresh.kumar@...aro.org>
To: Dhruva Gole <d-gole@...com>
Cc: "Rafael J. Wysocki" <rafael@...nel.org>, linux-pm@...r.kernel.org,
	linux-kernel@...r.kernel.org, Bryan Brattlof <bb@...com>,
	Nishanth Menon <nm@...com>, Andrew Davis <afd@...com>,
	Lee Jones <lee@...nel.org>, linux-arm-msm@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org,
	Mark Brown <broonie@...nel.org>
Subject: Re: [PATCH 0/2] ti-cpufreq: AM62: Backward compatibility for syscon
 and update offsets

On 01-10-24, 13:27, Dhruva Gole wrote:
> On Sep 30, 2024 at 15:02:08 +0530, Dhruva Gole wrote:
> > With the Silicon revision being taken directly from socinfo, there's no
> > longer any need for reading any SOC register for revision from this driver.
> > Hence, we do not require any rev_offset for AM62 family of devices.
> > 
> > Also, maintain the backward compatibility with old devicetree, and hence
> > add condition to handle the case where we have the zero offset such that we
> > don't end up reading the wrong register offset in new AM625 DTs whenever we fix
> > them up.
> > 
> > These patches have been in discussion as part of another series, which is now
> > being split up as per discussions with Nishanth. Ref. the following link for
> > more context on the same:
> > https://lore.kernel.org/all/20240926-ti-cpufreq-fixes-v5-v7-0-3c94c398fe8f@ti.com/
> > 
> > **DEPENDS ON:**
> > "mfd: syscon: Use regmap max_register_is_0 as needed"
> > https://lore.kernel.org/linux-arm-kernel/20240903184710.1552067-1-nm@ti.com/
> 
> Just an update, the above dependency patch is now taken in by Lee Jones [1].
> Waiting for it to finally appear in -next.
> 
> + Lee just because we are users of that patch.
> 
> [1]
> https://lore.kernel.org/linux-arm-kernel/172770742318.523866.16912261914335612487.b4-ty@kernel.org/

Ping me once this series is ready to be applied and all dependencies
are merged somewhere I can rebase.

-- 
viresh

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