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Message-ID: <20241005064307.18972-1-quic_rdwivedi@quicinc.com>
Date: Sat, 5 Oct 2024 12:13:04 +0530
From: Ram Kumar Dwivedi <quic_rdwivedi@...cinc.com>
To: <manivannan.sadhasivam@...aro.org>, <alim.akhtar@...sung.com>,
<avri.altman@....com>, <bvanassche@....org>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <andersson@...nel.org>,
<konrad.dybcio@...aro.org>, <James.Bottomley@...senPartnership.com>,
<martin.petersen@...cle.com>, <agross@...nel.org>
CC: <linux-arm-msm@...r.kernel.org>, <linux-scsi@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<quic_narepall@...cinc.com>, <quic_nitirawa@...cinc.com>,
<quic_rdwivedi@...cinc.com>
Subject: [PATCH V1 0/3] Add support for multiple ICE algorithms
Add support for ICE algorithms for Qualcomm UFS V5.0 and above,
which uses a pool of crypto cores for TX stream (UFS Write –
Encryption) and RX stream (UFS Read – Decryption).
Using these algorithms, crypto cores can be dynamically allocated
to either RX stream or TX stream based on algorithm selected.
Qualcomm UFS controller supports three ICE algorithms:
Floor based algorithm, Static Algorithm and Instantaneous algorithm
to share crypto cores between TX and RX stream.
Floor Based allocation is selected by default after power On or Reset.
Ram Kumar Dwivedi (3):
dt-bindings: ufs: qcom: Document ice configuration table
arm64: dts: qcom: sm8650: Add ICE algorithm entries
scsi: ufs: qcom: Add support for multiple ICE algorithms
.../devicetree/bindings/ufs/qcom,ufs.yaml | 24 ++
arch/arm64/boot/dts/qcom/sm8650.dtsi | 19 ++
drivers/ufs/host/ufs-qcom.c | 232 ++++++++++++++++++
drivers/ufs/host/ufs-qcom.h | 38 ++-
4 files changed, 312 insertions(+), 1 deletion(-)
--
2.46.0
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