lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: 
 <172822135999.3395169.2185051958968934926.git-patchwork-notify@kernel.org>
Date: Sun, 06 Oct 2024 13:29:19 +0000
From: patchwork-bot+linux-riscv@...nel.org
To: Deepak Gupta <debug@...osinc.com>
Cc: linux-riscv@...ts.infradead.org, tglx@...utronix.de, mingo@...hat.com,
 bp@...en8.de, dave.hansen@...ux.intel.com, x86@...nel.org, hpa@...or.com,
 akpm@...ux-foundation.org, Liam.Howlett@...cle.com, vbabka@...e.cz,
 lorenzo.stoakes@...cle.com, paul.walmsley@...ive.com, palmer@...belt.com,
 aou@...s.berkeley.edu, conor@...nel.org, robh@...nel.org, krzk+dt@...nel.org,
 arnd@...db.de, brauner@...nel.org, peterz@...radead.org, oleg@...hat.com,
 ebiederm@...ssion.com, kees@...nel.org, corbet@....net, shuah@...nel.org,
 linux-kernel@...r.kernel.org, linux-fsdevel@...r.kernel.org,
 linux-mm@...ck.org, devicetree@...r.kernel.org, linux-arch@...r.kernel.org,
 linux-doc@...r.kernel.org, linux-kselftest@...r.kernel.org,
 alistair.francis@....com, richard.henderson@...aro.org, jim.shu@...ive.com,
 andybnac@...il.com, kito.cheng@...ive.com, charlie@...osinc.com,
 atishp@...osinc.com, evan@...osinc.com, cleger@...osinc.com,
 alexghiti@...osinc.com, samitolvanen@...gle.com, broonie@...nel.org,
 rick.p.edgecombe@...el.com, david@...hat.com, carlos.bilbao.osdev@...il.com,
 samuel.holland@...ive.com, ajones@...tanamicro.com,
 conor.dooley@...rochip.com, andy.chiu@...ive.com
Subject: Re: [PATCH 00/33] riscv control-flow integrity for usermode

Hello:

This series was applied to riscv/linux.git (for-next)
by Palmer Dabbelt <palmer@...osinc.com>:

On Tue, 01 Oct 2024 09:06:05 -0700 you wrote:
> v5 for cpu assisted riscv user mode control flow integrity.
> zicfiss and zicfilp [1] are ratified riscv CPU extensions.
> 
> Changes in this version are
> - rebased on v6.12-rc1
> - Fixed schema related issues in device tree file
> - Fixed some of the documentation related issues in zicfilp/ss.rst
>   (style issues and added index)
> - added `SHADOW_STACK_SET_MARKER` so that implementation can define base
>   of shadow stack.
> - Fixed warnings on definitions added in usercfi.h when
>   CONFIG_RISCV_USER_CFI is not selected.
> - Adopted context header based signal handling as proposed by Andy Chiu
> - Added support for enabling kernel mode access to shadow stack using
>   FWFT [4]
> 
> [...]

Here is the summary with links:
  - [01/33] mm: Introduce ARCH_HAS_USER_SHADOW_STACK
    (no matching commit)
  - [02/33] mm: helper `is_shadow_stack_vma` to check shadow stack vma
    (no matching commit)
  - [03/33] riscv: Enable cbo.zero only when all harts support Zicboz
    https://git.kernel.org/riscv/c/1b57747e978f
  - [04/33] riscv: Add support for per-thread envcfg CSR values
    (no matching commit)
  - [05/33] riscv: Call riscv_user_isa_enable() only on the boot hart
    (no matching commit)
  - [06/33] riscv/Kconfig: enable HAVE_EXIT_THREAD for riscv
    (no matching commit)
  - [07/33] riscv: zicfilp / zicfiss in dt-bindings (extensions.yaml)
    (no matching commit)
  - [08/33] riscv: zicfiss / zicfilp enumeration
    (no matching commit)
  - [09/33] riscv: zicfiss / zicfilp extension csr and bit definitions
    (no matching commit)
  - [10/33] riscv: usercfi state for task and save/restore of CSR_SSP on trap entry/exit
    (no matching commit)
  - [11/33] riscv/mm : ensure PROT_WRITE leads to VM_READ | VM_WRITE
    (no matching commit)
  - [12/33] riscv mm: manufacture shadow stack pte
    (no matching commit)
  - [13/33] riscv mmu: teach pte_mkwrite to manufacture shadow stack PTEs
    (no matching commit)
  - [14/33] riscv mmu: write protect and shadow stack
    (no matching commit)
  - [15/33] riscv/mm: Implement map_shadow_stack() syscall
    (no matching commit)
  - [16/33] riscv/shstk: If needed allocate a new shadow stack on clone
    (no matching commit)
  - [17/33] prctl: arch-agnostic prctl for shadow stack
    (no matching commit)
  - [18/33] prctl: arch-agnostic prctl for indirect branch tracking
    (no matching commit)
  - [19/33] riscv: Implements arch agnostic shadow stack prctls
    (no matching commit)
  - [20/33] riscv: Implements arch agnostic indirect branch tracking prctls
    (no matching commit)
  - [21/33] riscv/traps: Introduce software check exception
    (no matching commit)
  - [22/33] riscv: signal: abstract header saving for setup_sigcontext
    (no matching commit)
  - [23/33] riscv signal: save and restore of shadow stack for signal
    (no matching commit)
  - [24/33] riscv/kernel: update __show_regs to print shadow stack register
    (no matching commit)
  - [25/33] riscv/ptrace: riscv cfi status and state via ptrace and in core files
    (no matching commit)
  - [26/33] riscv/hwprobe: zicfilp / zicfiss enumeration in hwprobe
    (no matching commit)
  - [27/33] riscv: Add Firmware Feature SBI extensions definitions
    (no matching commit)
  - [28/33] riscv: enable kernel access to shadow stack memory via FWFT sbi call
    (no matching commit)
  - [29/33] riscv: kernel command line option to opt out of user cfi
    (no matching commit)
  - [30/33] riscv: create a config for shadow stack and landing pad instr support
    (no matching commit)
  - [31/33] riscv: Documentation for landing pad / indirect branch tracking
    (no matching commit)
  - [32/33] riscv: Documentation for shadow stack on riscv
    (no matching commit)
  - [33/33] kselftest/riscv: kselftest for user mode cfi
    (no matching commit)

You are awesome, thank you!
-- 
Deet-doot-dot, I am a bot.
https://korg.docs.kernel.org/patchwork/pwbot.html



Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ