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Message-ID: <20241011205431de827807@mail.local>
Date: Fri, 11 Oct 2024 22:54:31 +0200
From: Alexandre Belloni <alexandre.belloni@...tlin.com>
To: Sergey Matsievskiy <matsievskiysv@...il.com>
Cc: linus.walleij@...aro.org, quentin.schulz@...tlin.com,
lars.povlsen@...rochip.com, horatiu.vultur@...rochip.com,
andriy.shevchenko@...ux.intel.com, linux-gpio@...r.kernel.org,
linux-kernel@...r.kernel.org, linux-mips@...r.kernel.org,
UNGLinuxDriver@...rochip.com
Subject: Re: [PATCH 1/1] pinctrl: ocelot: fix system hang on level based
interrupts
On 06/10/2024 21:13:10+0300, Sergey Matsievskiy wrote:
> Fix interrupt handle loops, produced by spurious and short level based
> interrupts by unconditionally clearing the parent interrupt, even when
> no GPIO interrupts are pending.
>
> Signed-off-by: Sergey Matsievskiy <matsievskiysv@...il.com>
Reviewed-by: Alexandre Belloni <alexandre.belloni@...tlin.com>
> ---
> drivers/pinctrl/pinctrl-ocelot.c | 8 ++++----
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/pinctrl/pinctrl-ocelot.c b/drivers/pinctrl/pinctrl-ocelot.c
> index be9b8c010167..d1ab8450ea93 100644
> --- a/drivers/pinctrl/pinctrl-ocelot.c
> +++ b/drivers/pinctrl/pinctrl-ocelot.c
> @@ -1955,21 +1955,21 @@ static void ocelot_irq_handler(struct irq_desc *desc)
> unsigned int reg = 0, irq, i;
> unsigned long irqs;
>
> + chained_irq_enter(parent_chip, desc);
> +
> for (i = 0; i < info->stride; i++) {
> regmap_read(info->map, id_reg + 4 * i, ®);
> if (!reg)
> continue;
>
> - chained_irq_enter(parent_chip, desc);
> -
> irqs = reg;
>
> for_each_set_bit(irq, &irqs,
> min(32U, info->desc->npins - 32 * i))
> generic_handle_domain_irq(chip->irq.domain, irq + 32 * i);
> -
> - chained_irq_exit(parent_chip, desc);
> }
> +
> + chained_irq_exit(parent_chip, desc);
> }
>
> static int ocelot_gpiochip_register(struct platform_device *pdev,
> --
> 2.39.5
>
--
Alexandre Belloni, co-owner and COO, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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