linux-kernel - Re: [PATCH v1 04/10] media: platform: mediatek: add isp

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Message-ID: <40daa456132651b85d2e68bec014fcba390b8671.camel@mediatek.com>
Date: Fri, 11 Oct 2024 02:55:41 +0000
From: CK Hu (胡俊光) <ck.hu@...iatek.com>
To: "sumit.semwal@...aro.org" <sumit.semwal@...aro.org>,
	"christian.koenig@....com" <christian.koenig@....com>, "mchehab@...nel.org"
	<mchehab@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>,
	"robh@...nel.org" <robh@...nel.org>, "matthias.bgg@...il.com"
	<matthias.bgg@...il.com>, "krzk+dt@...nel.org" <krzk+dt@...nel.org>,
	AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>,
	Shu-hsiang Yang (楊舒翔)
	<Shu-hsiang.Yang@...iatek.com>
CC: "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-mediatek@...ts.infradead.org" <linux-mediatek@...ts.infradead.org>,
	"yunkec@...omium.org" <yunkec@...omium.org>, "linaro-mm-sig@...ts.linaro.org"
	<linaro-mm-sig@...ts.linaro.org>, "linux-media@...r.kernel.org"
	<linux-media@...r.kernel.org>, "devicetree@...r.kernel.org"
	<devicetree@...r.kernel.org>, Yaya Chang (張雅清)
	<Yaya.Chang@...iatek.com>, Project_Global_Chrome_Upstream_Group
	<Project_Global_Chrome_Upstream_Group@...iatek.com>,
	"dri-devel@...ts.freedesktop.org" <dri-devel@...ts.freedesktop.org>,
	Teddy Chen (陳乾元) <Teddy.Chen@...iatek.com>,
	"linux-arm-kernel@...ts.infradead.org"
	<linux-arm-kernel@...ts.infradead.org>, "hidenorik@...omium.org"
	<hidenorik@...omium.org>, Shun-Yi Wang (王順億)
	<Shun-Yi.Wang@...iatek.com>
Subject: Re: [PATCH v1 04/10] media: platform: mediatek: add isp_7x cam-raw
 unit

Hi, Shu-hsiang:

On Wed, 2024-10-09 at 19:15 +0800, Shu-hsiang Yang wrote:
> Introduces the ISP pipeline driver for the MediaTek ISP raw and yuv
> modules. Key functionalities include data processing, V4L2 integration,
> resource management, debug support, and various control operations.
> Additionally, IRQ handling, platform device management, and MediaTek
> ISP DMA format support are also included.
> 
> Signed-off-by: Shu-hsiang Yang <Shu-hsiang.Yang@...iatek.com>
> ---

[snip]

> +
> +static void set_fifo_threshold(void __iomem *dma_base)
> +{
> +	u32 fifo_size = 0;
> +
> +	fifo_size = readl_relaxed(dma_base + DMA_OFFSET_CON0) & 0xFFF;
> +	writel_relaxed((0x1 << 28) |
> +		       ((fifo_size * 1 / 4) & 0xFFF) << 16 |
> +		       ((fifo_size * 1 / 8) & 0xFFF),
> +		       dma_base + DMA_OFFSET_CON1);

I can not find definition of DMA_OFFSET_CON1 in this patch, but I find it in [6/10] patch.
Move the definition to this patch.
And when you add this file, make sure you could build it successfully.

Regards,
CK

> +	writel_relaxed((0x1 << 28) |
> +		       ((fifo_size * 1 / 2) & 0xFFF) << 16 |
> +		       ((fifo_size * 3 / 8) & 0xFFF),
> +		       dma_base + DMA_OFFSET_CON2);
> +	writel_relaxed((0x1 << 31) |
> +		       ((fifo_size * 2 / 3) & 0xFFF) << 16 |
> +		       ((fifo_size * 13 / 24) & 0xFFF),
> +		       dma_base + DMA_OFFSET_CON3);
> +	writel_relaxed((0x1 << 31) |
> +		       ((fifo_size * 3 / 8) & 0xFFF) << 16 |
> +		       ((fifo_size * 1 / 4) & 0xFFF),
> +		       dma_base + DMA_OFFSET_CON4);
> +}
> +