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Message-Id: <20241012-spi_multi_cs_cleanup-v1-6-dc491113880d@gmail.com>
Date: Sat, 12 Oct 2024 11:53:40 +0200
From: Jonas Gorski <jonas.gorski@...il.com>
To: Mark Brown <broonie@...nel.org>,
Amit Kumar Mahapatra <amit.kumar-mahapatra@....com>
Cc: linux-spi@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH 6/6] spi: rename SPI_CS_CNT_MAX => SPI_DEVICE_CS_CNT_MAX
Rename SPI_CS_CNT_MAX to SPI_DEVICE_CS_CNT_MAX to make it more obvious
that this is the max number of CS per device supported, not per
controller.
Signed-off-by: Jonas Gorski <jonas.gorski@...il.com>
---
drivers/spi/spi-cadence-quadspi.c | 2 +-
drivers/spi/spi.c | 12 ++++++------
include/linux/spi/spi.h | 13 +++++++------
3 files changed, 14 insertions(+), 13 deletions(-)
diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c
index 0b45b7b2b3ab30951d94ea2ce57dcba3a2600847..3b5776c80c6adfdb4ff67f03b065f0bb81fb735b 100644
--- a/drivers/spi/spi-cadence-quadspi.c
+++ b/drivers/spi/spi-cadence-quadspi.c
@@ -33,7 +33,7 @@
#define CQSPI_NAME "cadence-qspi"
#define CQSPI_MAX_CHIPSELECT 4
-static_assert(CQSPI_MAX_CHIPSELECT <= SPI_CS_CNT_MAX);
+static_assert(CQSPI_MAX_CHIPSELECT <= SPI_DEVICE_CS_CNT_MAX);
/* Quirks */
#define CQSPI_NEEDS_WR_DELAY BIT(0)
diff --git a/drivers/spi/spi.c b/drivers/spi/spi.c
index ebf8bc9c2276a6f50ba6e9fded48c870c4bd5ff0..a147975cec452bc857f836ce9742da0b6ddfcff2 100644
--- a/drivers/spi/spi.c
+++ b/drivers/spi/spi.c
@@ -671,9 +671,9 @@ static int __spi_add_device(struct spi_device *spi)
int status, idx;
u8 cs;
- if (spi->num_chipselect > SPI_CS_CNT_MAX) {
+ if (spi->num_chipselect > SPI_DEVICE_CS_CNT_MAX) {
dev_err(dev, "num_cs %d > max %d\n", spi->num_chipselect,
- SPI_CS_CNT_MAX);
+ SPI_DEVICE_CS_CNT_MAX);
return -EOVERFLOW;
}
@@ -1075,7 +1075,7 @@ static void spi_set_cs(struct spi_device *spi, bool enable, bool force)
trace_spi_set_cs(spi, activate);
spi->controller->last_cs_index_mask = spi->cs_index_mask;
- for (idx = 0; idx < SPI_CS_CNT_MAX; idx++) {
+ for (idx = 0; idx < SPI_DEVICE_CS_CNT_MAX; idx++) {
if (enable && idx < spi->num_chipselect)
spi->controller->last_cs[idx] = spi_get_chipselect(spi, 0);
else
@@ -2357,7 +2357,7 @@ static void of_spi_parse_dt_cs_delay(struct device_node *nc,
static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
struct device_node *nc)
{
- u32 value, cs[SPI_CS_CNT_MAX];
+ u32 value, cs[SPI_DEVICE_CS_CNT_MAX];
int rc, idx;
/* Mode (clock phase/polarity/etc.) */
@@ -2432,7 +2432,7 @@ static int of_spi_parse_dt(struct spi_controller *ctlr, struct spi_device *spi,
/* Device address */
rc = of_property_read_variable_u32_array(nc, "reg", &cs[0], 1,
- SPI_CS_CNT_MAX);
+ SPI_DEVICE_CS_CNT_MAX);
if (rc < 0) {
dev_err(&ctlr->dev, "%pOF has no valid 'reg' property (%d)\n",
nc, rc);
@@ -3316,7 +3316,7 @@ int spi_register_controller(struct spi_controller *ctlr)
}
/* Setting last_cs to SPI_INVALID_CS means no chip selected */
- for (idx = 0; idx < SPI_CS_CNT_MAX; idx++)
+ for (idx = 0; idx < SPI_DEVICE_CS_CNT_MAX; idx++)
ctlr->last_cs[idx] = SPI_INVALID_CS;
status = device_add(&ctlr->dev);
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index fe99f46c7d926eeb75398f4dddc5ef64d8f7736e..cdf8e4338f3850075123eec76db75a94033ccaaa 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -21,7 +21,7 @@
#include <uapi/linux/spi/spi.h>
/* Max no. of CS supported per spi device */
-#define SPI_CS_CNT_MAX 4
+#define SPI_DEVICE_CS_CNT_MAX 4
struct dma_chan;
struct software_node;
@@ -186,7 +186,7 @@ struct spi_device {
struct device dev;
struct spi_controller *controller;
u32 max_speed_hz;
- u8 chip_select[SPI_CS_CNT_MAX];
+ u8 chip_select[SPI_DEVICE_CS_CNT_MAX];
u8 num_chipselect;
u8 bits_per_word;
bool rt;
@@ -218,7 +218,8 @@ struct spi_device {
void *controller_data;
char modalias[SPI_NAME_SIZE];
const char *driver_override;
- struct gpio_desc *cs_gpiod[SPI_CS_CNT_MAX]; /* Chip select gpio desc */
+ /* Chip select gpio desc */
+ struct gpio_desc *cs_gpiod[SPI_DEVICE_CS_CNT_MAX];
struct spi_delay word_delay; /* Inter-word delay */
/* CS delays */
struct spi_delay cs_setup;
@@ -233,7 +234,7 @@ struct spi_device {
* multiple chip selects & memories are connected in parallel
* then more than one bit need to be set in cs_index_mask.
*/
- u32 cs_index_mask : SPI_CS_CNT_MAX;
+ u32 cs_index_mask : SPI_DEVICE_CS_CNT_MAX;
/*
* Likely need more hooks for more protocol options affecting how
@@ -711,8 +712,8 @@ struct spi_controller {
bool auto_runtime_pm;
bool fallback;
bool last_cs_mode_high;
- s8 last_cs[SPI_CS_CNT_MAX];
- u32 last_cs_index_mask : SPI_CS_CNT_MAX;
+ s8 last_cs[SPI_DEVICE_CS_CNT_MAX];
+ u32 last_cs_index_mask : SPI_DEVICE_CS_CNT_MAX;
struct completion xfer_completion;
size_t max_dma_len;
--
2.43.0
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