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Message-ID: <CAEEQ3wnZaTnUDgKr3tTmD0q=G118u4RReiShNAfxScxiOcKqmg@mail.gmail.com>
Date: Mon, 14 Oct 2024 20:29:15 +0800
From: yunhui cui <cuiyunhui@...edance.com>
To: Sunil V L <sunilvl@...tanamicro.com>
Cc: punit.agrawal@...edance.com, paul.walmsley@...ive.com, palmer@...belt.com,
aou@...s.berkeley.edu, ajones@...tanamicro.com, alexghiti@...osinc.com,
jeeheng.sia@...rfivetech.com, haibo1.xu@...el.com,
linux-riscv@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [External] Re: [PATCH] RISC-V: ACPI: fix early_ioremap to early_memremap
Hi Sunil,
On Mon, Oct 14, 2024 at 7:35 PM Sunil V L <sunilvl@...tanamicro.com> wrote:
>
> Hi Yunhui,
> On Mon, Oct 14, 2024 at 05:47:05PM +0800, Yunhui Cui wrote:
> > When SVPBMT is enabled, __acpi_map_table() will directly access the
> > data in DDR through the IO attribute, rather than through hardware
> > cache consistency, resulting in incorrect data in the obtained ACPI
> > table.
> >
> > The log: ACPI: [ACPI:0x18] Invalid zero length.
> >
> > We do not assume whether the bootloader flushes or not. We should
> > access in a cacheable way instead of maintaining cache consistency
> > by software.
> >
> > Signed-off-by: Yunhui Cui <cuiyunhui@...edance.com>
> > ---
> > arch/riscv/kernel/acpi.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/arch/riscv/kernel/acpi.c b/arch/riscv/kernel/acpi.c
> > index 6e0d333f57e5..3177c9af8764 100644
> > --- a/arch/riscv/kernel/acpi.c
> > +++ b/arch/riscv/kernel/acpi.c
> > @@ -210,7 +210,7 @@ void __init __iomem *__acpi_map_table(unsigned long phys, unsigned long size)
> > if (!size)
> > return NULL;
> >
> > - return early_ioremap(phys, size);
> > + return early_memremap(phys, size);
> > }
> >
> I think __acpi_unmap_table() also needs similar change. You might need
> to typecast to suppress the sparse error [1] then.
OK. I will make the changes in v2. Regarding the sparse error, I will
use another patch specifically to solve it. Is that okay?
>
> [1] - https://lore.kernel.org/oe-kbuild-all/202305201427.I7QhPjNW-lkp@intel.com/#r
>
> Thanks,
> Sunil
Thanks,
Yunhui
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