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Message-ID: <20241016215401.GC1742@sol.localdomain>
Date: Wed, 16 Oct 2024 14:54:01 -0700
From: Eric Biggers <ebiggers@...nel.org>
To: Ard Biesheuvel <ardb+git@...gle.com>
Cc: linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
linux-crypto@...r.kernel.org, herbert@...dor.apana.org.au,
will@...nel.org, catalin.marinas@....com,
Ard Biesheuvel <ardb@...nel.org>, Kees Cook <kees@...nel.org>
Subject: Re: [PATCH v2 2/2] arm64/crc32: Implement 4-way interleave using
PMULL
On Wed, Oct 16, 2024 at 09:26:43PM +0200, Ard Biesheuvel wrote:
> From: Ard Biesheuvel <ardb@...nel.org>
>
> Now that kernel mode NEON no longer disables preemption, using FP/SIMD
> in library code which is not obviously part of the crypto subsystem is
> no longer problematic, as it will no longer incur unexpected latencies.
>
> So accelerate the CRC-32 library code on arm64 to use a 4-way
> interleave, using PMULL instructions to implement the folding.
>
> On Apple M2, this results in a speedup of 2 - 2.8x when using input
> sizes of 1k - 8k. For smaller sizes, the overhead of preserving and
> restoring the FP/SIMD register file may not be worth it, so 1k is used
> as a threshold for choosing this code path.
>
> The coefficient tables were generated using code provided by Eric. [0]
>
> [0] https://github.com/ebiggers/libdeflate/blob/master/scripts/gen_crc32_multipliers.c
>
> Cc: Eric Biggers <ebiggers@...nel.org>
> Signed-off-by: Ard Biesheuvel <ardb@...nel.org>
> ---
> arch/arm64/lib/Makefile | 2 +-
> arch/arm64/lib/crc32-4way.S | 242 ++++++++++++++++++++
> arch/arm64/lib/crc32-glue.c | 48 ++++
> 3 files changed, 291 insertions(+), 1 deletion(-)
Reviewed-by: Eric Biggers <ebiggers@...gle.com>
> + /* Process up to 64 blocks of 64 bytes at a time */
> +.La\@: mov x3, #64
> + cmp len, #64
> + csel x3, x3, len, hi // x3 := max(len, 64)
The comment should say min(len, 64), not max(len, 64).
- Eric
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