[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <a20e6927d38aed4e5b1cb1f49346ca29.sboyd@kernel.org>
Date: Thu, 17 Oct 2024 15:59:08 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Conor Dooley <conor+dt@...nel.org>, Daniel Machon <daniel.machon@...rochip.com>, Horatiu Vultur <horatiu.vultur@...rochip.com>, Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Michael Turquette <mturquette@...libre.com>, Rob Herring <robh@...nel.org>, Steen Hegelund <Steen.Hegelund@...rochip.com>
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/4] clk: lan966x: add support for lan969x SoC clock driver
Quoting Daniel Machon (2024-09-16 02:49:18)
> Add support for the lan969x SoC clock driver in the existing lan966x
> driver. The lan969x clock controller contains 3 PLLs - cpu_clk, ddr_clk
> and sys_clk which generates and supplies the clock to various
> peripherals within the SoC.
>
> Patch #1 adds compatible strings for lan969x SKU's in the dt-bindings
>
> Patch #2 makes the clk_names var const char * const
>
> Patch #3 prepares the lan966x driver for lan969x, by adding private
> match data.
>
> Patch #4 adds support for lan969x
>
> Signed-off-by: Daniel Machon <daniel.machon@...rochip.com>
>
> Signed-off-by: Daniel Machon <daniel.machon@...rochip.com>
Am I supposed to pick up microchip clk patches myself this time?
Powered by blists - more mailing lists