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Message-ID: <ab1fa4c9-6b4d-41a4-b337-ce9d7f5052ec@tuxon.dev>
Date: Fri, 18 Oct 2024 11:34:16 +0300
From: claudiu beznea <claudiu.beznea@...on.dev>
To: Stephen Boyd <sboyd@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Daniel Machon <daniel.machon@...rochip.com>,
Horatiu Vultur <horatiu.vultur@...rochip.com>,
Kavyasree Kotagiri <kavyasree.kotagiri@...rochip.com>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Michael Turquette <mturquette@...libre.com>, Rob Herring <robh@...nel.org>,
Steen Hegelund <Steen.Hegelund@...rochip.com>
Cc: linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH 0/4] clk: lan966x: add support for lan969x SoC clock
driver
On 18.10.2024 01:59, Stephen Boyd wrote:
> Quoting Daniel Machon (2024-09-16 02:49:18)
>> Add support for the lan969x SoC clock driver in the existing lan966x
>> driver. The lan969x clock controller contains 3 PLLs - cpu_clk, ddr_clk
>> and sys_clk which generates and supplies the clock to various
>> peripherals within the SoC.
>>
>> Patch #1 adds compatible strings for lan969x SKU's in the dt-bindings
>>
>> Patch #2 makes the clk_names var const char * const
>>
>> Patch #3 prepares the lan966x driver for lan969x, by adding private
>> match data.
>>
>> Patch #4 adds support for lan969x
>>
>> Signed-off-by: Daniel Machon <daniel.machon@...rochip.com>
>>
>> Signed-off-by: Daniel Machon <daniel.machon@...rochip.com>
>
> Am I supposed to pick up microchip clk patches myself this time?
It's on my track. I already have it on my local queue for a while. Sorry
for not mentioning it yet. I need to run some tests.
Thank you,
Claudiu
>
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