linux-kernel - Re: [PATCH v3 1/2] dt-bindings: usb: add TUSB73x0 PCIe

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Message-ID: <20241018141825.GA46391@francesco-nb>
Date: Fri, 18 Oct 2024 16:18:42 +0200
From: Francesco Dolcini <francesco@...cini.it>
To: Rob Herring <robh@...nel.org>
Cc: Francesco Dolcini <francesco@...cini.it>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>,
	Mathias Nyman <mathias.nyman@...el.com>,
	Francesco Dolcini <francesco.dolcini@...adex.com>,
	Parth Pancholi <parth.pancholi@...adex.com>,
	linux-usb@...r.kernel.org, devicetree@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/2] dt-bindings: usb: add TUSB73x0 PCIe

Hello Rob,
thanks for the review.

On Fri, Oct 18, 2024 at 09:07:43AM -0500, Rob Herring wrote:
> On Fri, Oct 18, 2024 at 12:55:04PM +0200, Francesco Dolcini wrote:
> > From: Parth Pancholi <parth.pancholi@...adex.com>
> > 
> > Add device tree bindings for TI's TUSB73x0 PCIe-to-USB 3.0 xHCI
> > host controller. The controller supports software configuration
> > through PCIe registers, such as controlling the PWRONx polarity
> > via the USB control register (E0h).
> > 
> > Similar generic PCIe-based bindings can be found as qcom,ath11k-pci.yaml
> > as an example.
> > 
> > Datasheet: https://www.ti.com/lit/ds/symlink/tusb7320.pdf
> > Signed-off-by: Parth Pancholi <parth.pancholi@...adex.com>
> > Signed-off-by: Francesco Dolcini <francesco.dolcini@...adex.com>
> > ---
> > v3: use lowercase hex in compatible
> > v2: rename property to ti,tusb7320-pwron-active-high and change type to flag
> > ---
> >  .../bindings/usb/ti,tusb73x0-pci.yaml         | 60 +++++++++++++++++++
> >  1 file changed, 60 insertions(+)
> >  create mode 100644 Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml
> > 
> > diff --git a/Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml b/Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml
> > new file mode 100644
> > index 000000000000..7083e24d279c
> > --- /dev/null
> > +++ b/Documentation/devicetree/bindings/usb/ti,tusb73x0-pci.yaml
> > @@ -0,0 +1,60 @@
> > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> > +%YAML 1.2
> > +---
> > +$id: http://devicetree.org/schemas/usb/ti,tusb73x0-pci.yaml#
> > +$schema: http://devicetree.org/meta-schemas/core.yaml#
> > +
> > +title: TUSB73x0 USB 3.0 xHCI Host Controller (PCIe)
> > +
> > +maintainers:
> > +  - Francesco Dolcini <francesco.dolcini@...adex.com>
> > +
> > +description:
> > +  TUSB73x0 USB 3.0 xHCI Host Controller via PCIe x1 Gen2 interface.
> > +  The TUSB7320 supports up to two downstream ports, the TUSB7340 supports up
> > +  to four downstream ports.
> 
> XHCI controller, should be referencing usb-xhci.yaml.
> 
> > +
> > +properties:
> > +  compatible:
> > +    const: pci104c,8241
> 
> 2 parts mentioned above, but only 1 PCI ID?

Exactly. Let me know if there is something we should do in this regard
(something in the commit message? or in the description?).

>From the datasheet:
  This 16-bit read only register contains the value 8241h,
  which is the device ID assigned by TI to the TUSB73X0

And one more confirmation, in the Linux code you have quirks for this
device that just check for a single device id:

drivers/usb/host/xhci-pci.c:459
  if (pdev->vendor == PCI_VENDOR_ID_TI && pdev->device == 0x8241)         
    xhci->quirks |= XHCI_LIMIT_ENDPOINT_INTERVAL_7;                 

Francesco