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Message-ID: <7af345be-8e8b-4c36-b105-67cdb24823e9@intel.com>
Date: Fri, 18 Oct 2024 13:36:52 -0700
From: Sohil Mehta <sohil.mehta@...el.com>
To: Qiuxu Zhuo <qiuxu.zhuo@...el.com>, <tony.luck@...el.com>, <bp@...en8.de>
CC: <tglx@...utronix.de>, <dave.hansen@...ux.intel.com>, <mingo@...hat.com>,
<hpa@...or.com>, <x86@...nel.org>, <linux-edac@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 10/10] x86/mce: Fix typos in comments
On 10/16/2024 5:30 AM, Qiuxu Zhuo wrote:
> Fix the following typos in comments:
>
> s/callin/calling/
> s/TBL/TLB/
>
Same as before. The exact change with details doesn't need to be listed
out again in the commit message. It can easily be observed from the diff.
> Reviewed-by: Tony Luck <tony.luck@...el.com>
> Signed-off-by: Qiuxu Zhuo <qiuxu.zhuo@...el.com>
> ---
> arch/x86/kernel/cpu/mce/core.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/mce/core.c b/arch/x86/kernel/cpu/mce/core.c
> index 844a6f8d6f39..19e6730e7c22 100644
> --- a/arch/x86/kernel/cpu/mce/core.c
> +++ b/arch/x86/kernel/cpu/mce/core.c
> @@ -1118,7 +1118,7 @@ static noinstr int mce_start(int *no_way_out)
> } else {
> /*
> * Subject: Now start the scanning loop one by one in
> - * the original callin order.
> + * the original calling order.
> * This way when there are any shared banks it will be
> * only seen by one CPU before cleared, avoiding duplicates.
> */
> @@ -1892,7 +1892,7 @@ static int __mcheck_cpu_apply_quirks(struct cpuinfo_x86 *c)
> case X86_VENDOR_AMD:
> if (c->x86 == 15 && this_cpu_read(mce_num_banks) > 4) {
> /*
> - * disable GART TBL walk error reporting, which
> + * disable GART TLB walk error reporting, which
> * trips off incorrectly with the IOMMU & 3ware
> * & Cerberus:
> */
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