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Message-ID: <20241021072606.585878-1-inochiama@gmail.com>
Date: Mon, 21 Oct 2024 15:26:04 +0800
From: Inochi Amaoto <inochiama@...il.com>
To: Chen Wang <unicorn_wang@...look.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jirislaby@...nel.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>,
Andy Shevchenko <andriy.shevchenko@...ux.intel.com>,
Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Inochi Amaoto <inochiama@...look.com>
Cc: Yixun Lan <dlan@...too.org>,
Inochi Amaoto <inochiama@...il.com>,
linux-kernel@...r.kernel.org,
linux-serial@...r.kernel.org,
devicetree@...r.kernel.org,
linux-riscv@...ts.infradead.org
Subject: [PATCH v2 0/2] serial: 8250_dw: Introduce SG2044 uart support.
SG2044 relys on an internal divisor when calculating bitrate, which
means a wrong clock for the most common bitrates. So a quirk is needed
for this uart device to skip the set rate call and only relys on the
internal UART divisor.
Changed from v1:
1. patch 1: improve the bindings commit message.
2. patch 2: rename jh7100 quirk and rename the quirk to
dw8250_skip_set_rate_data.
Inochi Amaoto (2):
dt-bindings: serial: snps-dw-apb-uart: Add Sophgo SG2044 uarts
serial: 8250_dw: Add Sophgo SG2044 quirk
.../devicetree/bindings/serial/snps-dw-apb-uart.yaml | 4 ++++
drivers/tty/serial/8250/8250_dw.c | 5 +++--
2 files changed, 7 insertions(+), 2 deletions(-)
--
2.47.0
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