linux-kernel - Re: [PATCH v2 5/6] phy: qualcomm: qmp-pcie: define several new registers

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Message-ID: <90ed498c-5d38-4aa4-8eac-6fee71a4387b@linaro.org>
Date: Mon, 21 Oct 2024 14:21:49 +0200
From: neil.armstrong@...aro.org
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
 Vinod Koul <vkoul@...nel.org>, Kishon Vijay Abraham I <kishon@...nel.org>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>
Cc: Johan Hovold <johan+linaro@...nel.org>, linux-arm-msm@...r.kernel.org,
 linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 5/6] phy: qualcomm: qmp-pcie: define several new
 registers

On 21/10/2024 12:33, Dmitry Baryshkov wrote:
> Define several registers to be used by PCIe QMP PHYs on v6 platforms.
> 
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> ---
>   drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h     | 3 +++
>   drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h          | 2 ++
>   drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6.h | 1 +
>   3 files changed, 6 insertions(+)
> 
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h
> index 0ca79333d94261610f7274968c96362dcfb1f354..45397cb3c0c6fd2cd989ddc600510589792a3b1a 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v6.h
> @@ -14,4 +14,7 @@
>   #define QPHY_PCIE_V6_PCS_PCIE_ENDPOINT_REFCLK_DRIVE	0x20
>   #define QPHY_PCIE_V6_PCS_PCIE_OSC_DTCT_ACTIONS		0x94
>   
> +#define QPHY_PCIE_V6_PCS_LANE1_INSIG_SW_CTRL2		0x024
> +#define QPHY_PCIE_V6_PCS_LANE1_INSIG_MX_CTRL2		0x028
> +
>   #endif
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> index 08299d2b78f096fa5f9388a4d54ddfa85667b18c..aa5afb921f12c07e0648f69433a2e6e2fb756c07 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcs-v6.h
> @@ -17,6 +17,8 @@
>   #define QPHY_V6_PCS_LOCK_DETECT_CONFIG3		0x0cc
>   #define QPHY_V6_PCS_LOCK_DETECT_CONFIG6		0x0d8
>   #define QPHY_V6_PCS_REFGEN_REQ_CONFIG1		0x0dc
> +#define QPHY_V6_PCS_G12S1_TXDEEMPH_M6DB		0x168
> +#define QPHY_V6_PCS_G3S2_PRE_GAIN		0x170
>   #define QPHY_V6_PCS_RX_SIGDET_LVL		0x188
>   #define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_L	0x190
>   #define QPHY_V6_PCS_RCVR_DTCT_DLY_P1U2_H	0x194
> diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6.h b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6.h
> index 23ffcfae9efab4a9e081414f9b3bbd0079d34f18..f47fdc9cecda8c4fe46c83e6449d68c033cd7fe2 100644
> --- a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6.h
> +++ b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6.h
> @@ -6,6 +6,7 @@
>   #ifndef QCOM_PHY_QMP_QSERDES_TXRX_USB_V6_H_
>   #define QCOM_PHY_QMP_QSERDES_TXRX_USB_V6_H_
>   
> +#define QSERDES_V6_TX_BIST_MODE_LANENO				0x00
>   #define QSERDES_V6_TX_CLKBUF_ENABLE				0x08
>   #define QSERDES_V6_TX_TX_EMP_POST1_LVL				0x0c
>   #define QSERDES_V6_TX_TX_DRV_LVL				0x14
> 

Reviewed-by: Neil Armstrong <neil.armstrong@...aro.org>