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Message-ID: <942f988f-8228-43e0-9b29-41fccddcaaf1@ti.com>
Date: Wed, 23 Oct 2024 20:35:15 +0530
From: Aniket Limaye <a-limaye@...com>
To: Manorit Chawdhry <m-chawdhry@...com>, Nishanth Menon <nm@...com>,
        Vignesh
 Raghavendra <vigneshr@...com>,
        Tero Kristo <kristo@...nel.org>, Rob Herring
	<robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>
CC: <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, Neha Malcom Francis <n-francis@...com>,
        Udit
 Kumar <u-kumar1@...com>, Beleswar Padhi <b-padhi@...com>,
        Siddharth Vadapalli
	<s-vadapalli@...com>, Andrew Davis <afd@...com>
Subject: Re: [PATCH v5 06/12] arm64: dts: ti: k3-j7200: Add bootph-*
 properties



On 23/10/24 12:27, Manorit Chawdhry wrote:
> Adds bootph-* properties to the leaf nodes to enable bootloaders to
> utilise them.
> 
> Following adds bootph-* to
> - System controller nodes that allow controlling power domain, clocks, etc.
> - secure_proxy_sa3/secure_proxy_main mboxes for communication with
>    System Controller
> - mcu_ringacc/mcu_udmap for DMA to SMS
> - chipid for detection soc information.
> - mcu_timer0 for bootloader tick-timer.
> - hbmc_mux for enabling Hyperflash support
> - ESM nodes for enabling ESM support.
> - wkup_vtm for enabling Adaptive voltage scaling(AVS) support
> 
> Signed-off-by: Manorit Chawdhry <m-chawdhry@...com>

Thanks for the patch!

Reviewed-by: Aniket Limaye <a-limaye@...com>

> ---
>   arch/arm64/boot/dts/ti/k3-j7200-main.dtsi       |  2 ++
>   arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi | 11 +++++++++++
>   2 files changed, 13 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> index 9386bf3ef9f6..ac9c0a939461 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> @@ -136,6 +136,7 @@ secure_proxy_main: mailbox@...00000 {
>   			      <0x00 0x32800000 0x00 0x100000>;
>   			interrupt-names = "rx_011";
>   			interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
> +			bootph-all;
>   		};
>   
>   		hwspinlock: spinlock@...00000 {
> @@ -1527,6 +1528,7 @@ main_r5fss0_core1: r5f@...0000 {
>   	main_esm: esm@...000 {
>   		compatible = "ti,j721e-esm";
>   		reg = <0x0 0x700000 0x0 0x1000>;
> +		bootph-pre-ram;
>   		ti,esm-pins = <656>, <657>;
>   	};
>   };
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index 5097d192c2b2..7e9ad2301937 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -21,16 +21,19 @@ dmsc: system-controller@...83000 {
>   		k3_pds: power-controller {
>   			compatible = "ti,sci-pm-domain";
>   			#power-domain-cells = <2>;
> +			bootph-all;
>   		};
>   
>   		k3_clks: clock-controller {
>   			compatible = "ti,k2g-sci-clk";
>   			#clock-cells = <2>;
> +			bootph-all;
>   		};
>   
>   		k3_reset: reset-controller {
>   			compatible = "ti,sci-reset";
>   			#reset-cells = <2>;
> +			bootph-all;
>   		};
>   	};
>   
> @@ -44,6 +47,7 @@ mcu_timer0: timer@...00000 {
>   		assigned-clocks = <&k3_clks 35 1>;
>   		assigned-clock-parents = <&k3_clks 35 2>;
>   		power-domains = <&k3_pds 35 TI_SCI_PD_EXCLUSIVE>;
> +		bootph-pre-ram;
>   		ti,timer-pwm;
>   	};
>   
> @@ -191,6 +195,7 @@ wkup_conf: bus@...00000 {
>   		chipid: chipid@14 {
>   			compatible = "ti,am654-chipid";
>   			reg = <0x14 0x4>;
> +			bootph-all;
>   		};
>   	};
>   
> @@ -344,6 +349,7 @@ mcu_ringacc: ringacc@...00000 {
>   			      <0x00 0x28440000 0x00 0x40000>;
>   			reg-names = "rt", "fifos", "proxy_gcfg",
>   				    "proxy_target", "cfg";
> +			bootph-all;
>   			ti,num-rings = <286>;
>   			ti,sci-rm-range-gp-rings = <0x1>; /* GP ring range */
>   			ti,sci = <&dmsc>;
> @@ -363,6 +369,7 @@ mcu_udmap: dma-controller@...c0000 {
>   				    "tchan", "rchan", "rflow";
>   			msi-parent = <&main_udmass_inta>;
>   			#dma-cells = <1>;
> +			bootph-all;
>   
>   			ti,sci = <&dmsc>;
>   			ti,sci-dev-id = <236>;
> @@ -383,6 +390,8 @@ secure_proxy_mcu: mailbox@...80000 {
>   		reg = <0x0 0x2a480000 0x0 0x80000>,
>   		      <0x0 0x2a380000 0x0 0x80000>,
>   		      <0x0 0x2a400000 0x0 0x80000>;
> +		bootph-pre-ram;
> +
>   		/*
>   		 * Marked Disabled:
>   		 * Node is incomplete as it is meant for bootloaders and
> @@ -534,6 +543,7 @@ hbmc_mux: mux-controller@...00004 {
>   			reg = <0x00 0x47000004 0x00 0x4>;
>   			#mux-control-cells = <1>;
>   			mux-reg-masks = <0x0 0x2>; /* HBMC select */
> +			bootph-all;
>   		};
>   
>   		hbmc: hyperbus@...34000 {
> @@ -652,6 +662,7 @@ wkup_vtm0: temperature-sensor@...40000 {
>   		      <0x00 0x42050000 0x00 0x350>;
>   		power-domains = <&k3_pds 154 TI_SCI_PD_EXCLUSIVE>;
>   		#thermal-sensor-cells = <1>;
> +		bootph-pre-ram;
>   	};
>   
>   	mcu_esm: esm@...00000 {
> 

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