linux-kernel - Re: [PATCH 1/4] arm64: dts: ti: k3-j7200: Fix clock ids for MCSPI instances

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Message-ID: <7f1d8857-9894-4db9-a0c4-534e1bff4cbb@ti.com>
Date: Thu, 24 Oct 2024 11:52:15 +0530
From: Aniket Limaye <a-limaye@...com>
To: Anurag Dutta <a-dutta@...com>, <nm@...com>, <vigneshr@...com>,
        <kristo@...nel.org>, <robh@...nel.org>, <krzk+dt@...nel.org>,
        <conor+dt@...nel.org>, <vaishnav.a@...com>, <j-keerthy@...com>
CC: <linux-arm-kernel@...ts.infradead.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <u-kumar1@...com>
Subject: Re: [PATCH 1/4] arm64: dts: ti: k3-j7200: Fix clock ids for MCSPI
 instances



On 23/10/24 16:15, Anurag Dutta wrote:
> The clock IDs for multiple MCSPI instances across wakeup as
> well as main domain in J7200 are incorrect when compared with
> documentation [1]. This results in kernel crashes when the said
> instances are enabled. Fix the clock ids to their appropriate
> values.
> 
> [1]https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/j7200/clocks.html
> 
> Fixes: 8f6c475f4ca7 ("arm64: dts: ti: k3-j7200: Add MCSPI nodes")
> 
> Signed-off-by: Anurag Dutta <a-dutta@...com>

Reviewed-by: Aniket Limaye <a-limaye@...com>

> ---
>   arch/arm64/boot/dts/ti/k3-j7200-main.dtsi       | 16 ++++++++--------
>   arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi |  6 +++---
>   2 files changed, 11 insertions(+), 11 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> index 9386bf3ef9f6..ee953c0bf11f 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi
> @@ -1145,7 +1145,7 @@ main_spi0: spi@...0000 {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
>   		power-domains = <&k3_pds 266 TI_SCI_PD_EXCLUSIVE>;
> -		clocks = <&k3_clks 266 1>;
> +		clocks = <&k3_clks 266 4>;
>   		status = "disabled";
>   	};
>   
> @@ -1156,7 +1156,7 @@ main_spi1: spi@...0000 {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
>   		power-domains = <&k3_pds 267 TI_SCI_PD_EXCLUSIVE>;
> -		clocks = <&k3_clks 267 1>;
> +		clocks = <&k3_clks 267 4>;
>   		status = "disabled";
>   	};
>   
> @@ -1167,7 +1167,7 @@ main_spi2: spi@...0000 {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
>   		power-domains = <&k3_pds 268 TI_SCI_PD_EXCLUSIVE>;
> -		clocks = <&k3_clks 268 1>;
> +		clocks = <&k3_clks 268 4>;
>   		status = "disabled";
>   	};
>   
> @@ -1178,7 +1178,7 @@ main_spi3: spi@...0000 {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
>   		power-domains = <&k3_pds 269 TI_SCI_PD_EXCLUSIVE>;
> -		clocks = <&k3_clks 269 1>;
> +		clocks = <&k3_clks 269 4>;
>   		status = "disabled";
>   	};
>   
> @@ -1189,7 +1189,7 @@ main_spi4: spi@...0000 {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
>   		power-domains = <&k3_pds 270 TI_SCI_PD_EXCLUSIVE>;
> -		clocks = <&k3_clks 270 1>;
> +		clocks = <&k3_clks 270 2>;
>   		status = "disabled";
>   	};
>   
> @@ -1200,7 +1200,7 @@ main_spi5: spi@...0000 {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
>   		power-domains = <&k3_pds 271 TI_SCI_PD_EXCLUSIVE>;
> -		clocks = <&k3_clks 271 1>;
> +		clocks = <&k3_clks 271 4>;
>   		status = "disabled";
>   	};
>   
> @@ -1211,7 +1211,7 @@ main_spi6: spi@...0000 {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
>   		power-domains = <&k3_pds 272 TI_SCI_PD_EXCLUSIVE>;
> -		clocks = <&k3_clks 272 1>;
> +		clocks = <&k3_clks 272 4>;
>   		status = "disabled";
>   	};
>   
> @@ -1222,7 +1222,7 @@ main_spi7: spi@...0000 {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
>   		power-domains = <&k3_pds 273 TI_SCI_PD_EXCLUSIVE>;
> -		clocks = <&k3_clks 273 1>;
> +		clocks = <&k3_clks 273 4>;
>   		status = "disabled";
>   	};
>   
> diff --git a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> index 5097d192c2b2..b18b2f2deb96 100644
> --- a/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> +++ b/arch/arm64/boot/dts/ti/k3-j7200-mcu-wakeup.dtsi
> @@ -494,7 +494,7 @@ mcu_spi0: spi@...00000 {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
>   		power-domains = <&k3_pds 274 TI_SCI_PD_EXCLUSIVE>;
> -		clocks = <&k3_clks 274 0>;
> +		clocks = <&k3_clks 274 4>;
>   		status = "disabled";
>   	};
>   
> @@ -505,7 +505,7 @@ mcu_spi1: spi@...10000 {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
>   		power-domains = <&k3_pds 275 TI_SCI_PD_EXCLUSIVE>;
> -		clocks = <&k3_clks 275 0>;
> +		clocks = <&k3_clks 275 4>;
>   		status = "disabled";
>   	};
>   
> @@ -516,7 +516,7 @@ mcu_spi2: spi@...20000 {
>   		#address-cells = <1>;
>   		#size-cells = <0>;
>   		power-domains = <&k3_pds 276 TI_SCI_PD_EXCLUSIVE>;
> -		clocks = <&k3_clks 276 0>;
> +		clocks = <&k3_clks 276 2>;
>   		status = "disabled";
>   	};
>