linux-kernel - Re: [PATCH v7 6/7] PCI: qcom: Disable ASPM L0s and remove BDF2SID mapping config for X1E80100 SoC

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Message-ID: <ca62ee1a-5681-4840-b9b4-ed45e731c449@quicinc.com>
Date: Thu, 24 Oct 2024 14:46:53 +0800
From: Qiang Yu <quic_qianyu@...cinc.com>
To: Bjorn Andersson <bjorn.andersson@....qualcomm.com>
CC: <manivannan.sadhasivam@...aro.org>, <vkoul@...nel.org>,
        <kishon@...nel.org>, <robh@...nel.org>, <andersson@...nel.org>,
        <konradybcio@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <mturquette@...libre.com>, <sboyd@...nel.org>, <abel.vesa@...aro.org>,
        <quic_msarkar@...cinc.com>, <quic_devipriy@...cinc.com>,
        <dmitry.baryshkov@...aro.org>, <kw@...ux.com>, <lpieralisi@...nel.org>,
        <neil.armstrong@...aro.org>, <linux-arm-msm@...r.kernel.org>,
        <linux-phy@...ts.infradead.org>, <linux-kernel@...r.kernel.org>,
        <linux-pci@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-clk@...r.kernel.org>, <johan+linaro@...nel.org>,
        <stable@...r.kernel.org>
Subject: Re: [PATCH v7 6/7] PCI: qcom: Disable ASPM L0s and remove BDF2SID
 mapping config for X1E80100 SoC


On 10/18/2024 10:25 PM, Bjorn Andersson wrote:
> On Wed, Oct 16, 2024 at 08:04:11PM -0700, Qiang Yu wrote:
>> Currently, the cfg_1_9_0 which is being used for X1E80100 has config_sid
>> callback in its ops and doesn't disable ASPM L0s. However, as same as
>> SC8280X, PCIe controllers on X1E80100 are connected to SMMUv3, hence don't
> Would be nice to document the connection between SMMUv3 and "don't need
> config_sid()" is because we don't have support for the SMMUv3.
We don't need config_sid because we have support for SMMUv3 on HW.
SMMUv3 is able to use BDF as SID, so BDF2SID mapping is not required
and removed on HW.

Thanks,
Qiang
>> need config_sid() callback and hardware team has recommended to disable
>> L0s as it is broken in the controller. Hence reuse cfg_sc8280xp for
> I expect that config_sid() and "disable L0s" are two separate issues.
> I'm fine with you solving both in a single commit, but I'd prefer the
> two subjects to be covered in at least two separate sentences.
>
> Regards,
> Bjorn
>
>> X1E80100.
>>
>> Fixes: 6d0c39324c5f ("PCI: qcom: Add X1E80100 PCIe support")
>> Cc: stable@...r.kernel.org
>> Signed-off-by: Qiang Yu <quic_qianyu@...cinc.com>
>> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
>> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
>> ---
>>   drivers/pci/controller/dwc/pcie-qcom.c | 2 +-
>>   1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c
>> index 468bd4242e61..c533e6024ba2 100644
>> --- a/drivers/pci/controller/dwc/pcie-qcom.c
>> +++ b/drivers/pci/controller/dwc/pcie-qcom.c
>> @@ -1847,7 +1847,7 @@ static const struct of_device_id qcom_pcie_match[] = {
>>   	{ .compatible = "qcom,pcie-sm8450-pcie0", .data = &cfg_1_9_0 },
>>   	{ .compatible = "qcom,pcie-sm8450-pcie1", .data = &cfg_1_9_0 },
>>   	{ .compatible = "qcom,pcie-sm8550", .data = &cfg_1_9_0 },
>> -	{ .compatible = "qcom,pcie-x1e80100", .data = &cfg_1_9_0 },
>> +	{ .compatible = "qcom,pcie-x1e80100", .data = &cfg_sc8280xp },
>>   	{ }
>>   };
>>   
>> -- 
>> 2.34.1
>>
>>
>> -- 
>> linux-phy mailing list
>> linux-phy@...ts.infradead.org
>> https://lists.infradead.org/mailman/listinfo/linux-phy

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