linux-kernel - Re: [PATCH V2 net 1/9] net: hns3: default enable tx bounce buffer when smmu enabled

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Message-ID: <d68ad0c3-3d53-406b-ad98-5686512fa48e@huawei.com>
Date: Thu, 24 Oct 2024 16:31:46 +0800
From: Jijie Shao <shaojijie@...wei.com>
To: Paolo Abeni <pabeni@...hat.com>, <davem@...emloft.net>,
	<edumazet@...gle.com>, <kuba@...nel.org>, <shenjian15@...wei.com>,
	<salil.mehta@...wei.com>
CC: <shaojijie@...wei.com>, <liuyonglong@...wei.com>,
	<wangpeiyang1@...wei.com>, <lanhao@...wei.com>, <chenhao418@...wei.com>,
	<netdev@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH V2 net 1/9] net: hns3: default enable tx bounce buffer
 when smmu enabled


on 2024/10/24 16:26, Paolo Abeni wrote:
> On 10/18/24 12:10, Jijie Shao wrote:
>> From: Peiyang Wang <wangpeiyang1@...wei.com>
>>
>> The SMMU engine on HIP09 chip has a hardware issue.
>> SMMU pagetable prefetch features may prefetch and use a invalid PTE
>> even the PTE is valid at that time. This will cause the device trigger
>> fake pagefaults. The solution is to avoid prefetching by adding a
>> SYNC command when smmu mapping a iova. But the performance of nic has a
>> sharp drop. Then we do this workaround, always enable tx bounce buffer,
>> avoid mapping/unmapping on TX path.
>>
>> This issue only affects HNS3, so we always enable
>> tx bounce buffer when smmu enabled to improve performance.
>>
>> Signed-off-by: Peiyang Wang <wangpeiyang1@...wei.com>
>> Signed-off-by: Jian Shen <shenjian15@...wei.com>
>> Signed-off-by: Jijie Shao <shaojijie@...wei.com>
> I'm sorry to nick pick on somewhat small details, but we really need a
> fixes tag here to make 110% clear is a bugfix. I guess it could be the
> commit introducing the support for the buggy H/W.
>
> Thanks,
>
> Paolo

I have a little doubt that this patch is about H/W problem,
so how can we write the the fixes tag?

Thanks,
Jijie Shao