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Message-ID: <20241026123058.28258-1-quic_rlaggysh@quicinc.com>
Date: Sat, 26 Oct 2024 12:30:55 +0000
From: Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>
To: Georgi Djakov <djakov@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio
	<konradybcio@...nel.org>
CC: Sibi Sankar <quic_sibis@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
        <linux-pm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>
Subject: [PATCH V2 0/3] Add EPSS L3 provider support on SA8775P SoC

Add Epoch Subsystem (EPSS) L3 provider support on SA8775P SoCs.

Changes since v1:
 - Avoided the usage of static IDs and implemented dynamic ID assignment
   for icc nodes using IDA.
 - Withdrew separate compatibles for cluster0 and cluster1.
 - Added new generic compatible "qcom,epss-l3-perf" which can be
   used as fallback for all chipsets which support perf voting.

Raviteja Laggyshetty (3):
  dt-bindings: interconnect: Add EPSS L3 compatible for SA8775P
  arm64: dts: qcom: sa8775p: add EPSS l3 interconnect provider
  interconnect: qcom: Add EPSS L3 support on SA8775P

 .../bindings/interconnect/qcom,osm-l3.yaml    |  4 +
 arch/arm64/boot/dts/qcom/sa8775p.dtsi         | 19 ++++
 drivers/interconnect/qcom/osm-l3.c            | 86 ++++++++++++++-----
 3 files changed, 87 insertions(+), 22 deletions(-)

-- 
2.39.2


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