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Message-ID: <bhnh2xcptccepv2sdyowmre6tm26klnfk5gunmy4lvc76pcfr6@lt7myqju77d6>
Date: Sat, 26 Oct 2024 18:35:12 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>
Cc: Georgi Djakov <djakov@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
Bjorn Andersson <andersson@...nel.org>, Konrad Dybcio <konradybcio@...nel.org>,
Sibi Sankar <quic_sibis@...cinc.com>, linux-arm-msm@...r.kernel.org, linux-pm@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH V2 3/3] interconnect: qcom: Add EPSS L3 support on SA8775P
On Sat, Oct 26, 2024 at 12:30:58PM +0000, Raviteja Laggyshetty wrote:
> Add Epoch Subsystem (EPSS) L3 interconnect provider support on
> SA8775P SoCs.
Please describe the reason for your changes. In its current form the
patch doesn't provide enough details.
Moreover I don't think it's a correct solution. Using a single ID space
for an interconnects doesn't really scale. In the longer term we should
follow CCF approach and switch to using the icc_node pointers when they
are known.
>
> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@...cinc.com>
> ---
> drivers/interconnect/qcom/osm-l3.c | 86 ++++++++++++++++++++++--------
> 1 file changed, 64 insertions(+), 22 deletions(-)
>
--
With best wishes
Dmitry
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