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Message-Id: <20241026-sar2130p-llcc-v3-0-2a58fa1b4d12@linaro.org>
Date: Sat, 26 Oct 2024 18:43:30 +0300
From: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Conor Dooley <conor@...nel.org>,
Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>
Cc: linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: [PATCH v3 0/3] soc: qcom: llcc: add support for SAR2130P and
SAR1130P platforms
Add support for LLCC programming on Qualcomm SAR2130P and SAR1130P
platforms. These platforms require few additional quirks in order to be
handled properly.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
---
Changes in v3:
- Use decimal numbers for bit shift values (instead of hex) (Konrad)
- Link to v2: https://lore.kernel.org/r/20241025-sar2130p-llcc-v2-0-7455dc40e952@linaro.org
Changes in v2:
- Added max_cap_shift and num_banks to struct qcom_llcc_config (Konrad)
- Link to v1: https://lore.kernel.org/r/20241019-sar2130p-llcc-v1-0-4e09063d04f2@linaro.org
---
Dmitry Baryshkov (3):
dt-bindings: cache: qcom,llcc: document SAR2130P and SAR1130P
soc: qcom: llcc: use deciman integers for bit shift values
soc: qcom: llcc: add support for SAR2130P and SAR1130P
.../devicetree/bindings/cache/qcom,llcc.yaml | 28 ++
drivers/soc/qcom/llcc-qcom.c | 472 ++++++++++++++++++++-
include/linux/soc/qcom/llcc-qcom.h | 12 +
3 files changed, 500 insertions(+), 12 deletions(-)
---
base-commit: f2493655d2d3d5c6958ed996b043c821c23ae8d3
change-id: 20241017-sar2130p-llcc-0c2616777cde
Best regards,
--
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
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