lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <173012047096.1442.13866797476752847698.tip-bot2@tip-bot2>
Date: Mon, 28 Oct 2024 13:01:10 -0000
From: "tip-bot2 for Perry Yuan" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Perry Yuan <perry.yuan@....com>,
 Mario Limonciello <mario.limonciello@....com>,
 "Borislav Petkov (AMD)" <bp@...en8.de>,
 "Gautham R. Shenoy" <gautham.shenoy@....com>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject: [tip: x86/cpu] x86/cpufeatures: Add X86_FEATURE_AMD_WORKLOAD_CLASS
 feature bit

The following commit has been merged into the x86/cpu branch of tip:

Commit-ID:     0c487010cb4f79e451ac9e7cc47494cb21ac3566
Gitweb:        https://git.kernel.org/tip/0c487010cb4f79e451ac9e7cc47494cb21ac3566
Author:        Perry Yuan <perry.yuan@....com>
AuthorDate:    Sun, 27 Oct 2024 21:02:41 -05:00
Committer:     Borislav Petkov (AMD) <bp@...en8.de>
CommitterDate: Mon, 28 Oct 2024 13:44:44 +01:00

x86/cpufeatures: Add X86_FEATURE_AMD_WORKLOAD_CLASS feature bit

Add a new feature bit that indicates support for workload-based heuristic
feedback to OS for scheduling decisions.

When the bit set, threads are classified during runtime into enumerated
classes. The classes represent thread performance/power characteristics
that may benefit from special scheduling behaviors.

Signed-off-by: Perry Yuan <perry.yuan@....com>
Signed-off-by: Mario Limonciello <mario.limonciello@....com>
Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>
Reviewed-by: Gautham R. Shenoy <gautham.shenoy@....com>
Link: https://lore.kernel.org/r/20241028020251.8085-4-mario.limonciello@amd.com
---
 arch/x86/include/asm/cpufeatures.h | 1 +
 arch/x86/kernel/cpu/scattered.c    | 1 +
 2 files changed, 2 insertions(+)

diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
index 1216a05..05e985c 100644
--- a/arch/x86/include/asm/cpufeatures.h
+++ b/arch/x86/include/asm/cpufeatures.h
@@ -474,6 +474,7 @@
 #define X86_FEATURE_CLEAR_BHB_LOOP_ON_VMEXIT (21*32+ 4) /* Clear branch history at vmexit using SW loop */
 #define X86_FEATURE_AMD_FAST_CPPC	(21*32 + 5) /* Fast CPPC */
 #define X86_FEATURE_AMD_HETEROGENEOUS_CORES (21*32 + 6) /* Heterogeneous Core Topology */
+#define X86_FEATURE_AMD_WORKLOAD_CLASS	(21*32 + 7) /* Workload Classification */
 
 /*
  * BUG word(s)
diff --git a/arch/x86/kernel/cpu/scattered.c b/arch/x86/kernel/cpu/scattered.c
index 307a917..1e54332 100644
--- a/arch/x86/kernel/cpu/scattered.c
+++ b/arch/x86/kernel/cpu/scattered.c
@@ -49,6 +49,7 @@ static const struct cpuid_bit cpuid_bits[] = {
 	{ X86_FEATURE_MBA,		CPUID_EBX,  6, 0x80000008, 0 },
 	{ X86_FEATURE_SMBA,		CPUID_EBX,  2, 0x80000020, 0 },
 	{ X86_FEATURE_BMEC,		CPUID_EBX,  3, 0x80000020, 0 },
+	{ X86_FEATURE_AMD_WORKLOAD_CLASS,	CPUID_EAX,  22, 0x80000021, 0 },
 	{ X86_FEATURE_PERFMON_V2,	CPUID_EAX,  0, 0x80000022, 0 },
 	{ X86_FEATURE_AMD_LBR_V2,	CPUID_EAX,  1, 0x80000022, 0 },
 	{ X86_FEATURE_AMD_LBR_PMC_FREEZE,	CPUID_EAX,  2, 0x80000022, 0 },

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ