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Message-ID: <0b5d01b6-988c-4d3c-b4dd-ee0afc288166@oss.qualcomm.com>
Date: Mon, 28 Oct 2024 14:15:22 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Christoph Hellwig <hch@....de>
Cc: Konrad Dybcio <konradybcio@...nel.org>, Keith Busch <kbusch@...nel.org>,
        Jens Axboe <axboe@...nel.dk>, Sagi Grimberg <sagi@...mberg.me>,
        Bjorn Andersson <bjorn.andersson@....qualcomm.com>,
        Marijn Suijten <marijn.suijten@...ainline.org>,
        linux-nvme@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] nvme-pci: Force NVME_QUIRK_SIMPLE_SUSPEND on Qualcomm
 hosts

On 28.10.2024 10:19 AM, Christoph Hellwig wrote:
> On Fri, Oct 25, 2024 at 05:30:05PM +0200, Konrad Dybcio wrote:
>> (Un?)fortunately, said platforms use FDT, so we can't fix that in ACPI.
> 
> Then generalize the acpi helper to a generic one checking ACPI and
> DT and specify a proper DT binding.
> 
> If th requirement to put all devices into D3 is a plaform propery
> a specific driver is always the wrong place for it.
> 
>> b) Adding such a property to the PCIe host node sounds a bit
>>    saner, but the NVMe code isn't aware of the RC. We could add
>>    something like:
> 
> Again, this all belongs into core code.  The nvme driver is just
> a consumer of this information, just like for example the AHCI
> driver.

Alright, I'll try to pursue that angle instead,

Konrad

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