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Message-ID: <CAGb2v65ZXftjrG9+f1_88=EsU7rM8vnOPZCszWfWYFQ+Do9Xsg@mail.gmail.com>
Date: Mon, 28 Oct 2024 15:44:26 +0800
From: Chen-Yu Tsai <wens@...nel.org>
To: Csókás Bence <csokas.bence@...lan.hu>
Cc: Krzysztof Kozlowski <krzk@...nel.org>, dmaengine@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
linux-kernel@...r.kernel.org, Mesih Kilinc <mesihkilinc@...il.com>,
Vinod Koul <vkoul@...nel.org>, Jernej Skrabec <jernej.skrabec@...il.com>,
Samuel Holland <samuel@...lland.org>, Philipp Zabel <p.zabel@...gutronix.de>
Subject: Re: [PATCH v2 02/10] dma-engine: sun4i: Add has_reset option to quirk
On Mon, Oct 28, 2024 at 3:37 PM Csókás Bence <csokas.bence@...lan.hu> wrote:
>
> Hi,
>
> On 2024. 10. 27. 21:42, Krzysztof Kozlowski wrote:
> > On Sun, Oct 27, 2024 at 10:14:32AM +0100, Csókás, Bence wrote:
> >> From: Mesih Kilinc <mesihkilinc@...il.com>
> >>
> >> Allwinner suniv F1C100s has a reset bit for DMA in CCU. Sun4i do not
> >> has this bit but in order to support suniv we need to add it. So add
> >> support for reset bit.
> >>
> >> static struct sun4i_dma_dev *to_sun4i_dma_dev(struct dma_device *dev)
> >> @@ -1215,6 +1218,15 @@ static int sun4i_dma_probe(struct platform_device *pdev)
> >> return PTR_ERR(priv->clk);
> >> }
> >>
> >> + if (priv->cfg->has_reset) {
> >> + priv->rst = devm_reset_control_get_exclusive(&pdev->dev,
> >> + NULL);
> >> + if (IS_ERR(priv->rst)) {
> >> + dev_err_probe(&pdev->dev, "Failed to get reset control\n");
> >
> > syntax is: return dev_err_probe()
> >
> > Best regards,
> > Krzysztof
>
> Thanks! And regarding v3 of this patch, I have `clk_disable_unprepare()`
> after `dev_err_probe()`, I assume I have to let that be i.e. not return
> immediately?
I suggest adding a patch to switch the clk API calls to devm_clk_get_enabled()
which handles all the cleanup. Similarly you can switch to
devm_reset_control_get_exclusive_deasserted()
for this patch.
ChenYu
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