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Message-ID: <7c044f73-534b-452b-a4d1-6d459b9e32b8@gmail.com>
Date: Mon, 28 Oct 2024 12:50:30 +0100
From: Gabor Juhos <j4g8y7@...il.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: Bjorn Andersson <andersson@...nel.org>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, linux-arm-msm@...r.kernel.org,
linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/5] clk: qcom: apss-ipq-pll: drop 'alpha_en_mask' from
IPQ5018 PLL config
2024. 10. 26. 20:55 keltezéssel, Dmitry Baryshkov írta:
> On Fri, Oct 25, 2024 at 10:05:04PM +0200, Gabor Juhos wrote:
>> 2024. 10. 25. 8:24 keltezéssel, Dmitry Baryshkov írta:
>>> On Mon, Oct 21, 2024 at 10:21:57PM +0200, Gabor Juhos wrote:
>>>> Since neither 'alpha' nor 'alpha_hi' is defined in the configuration,
>>>> those will be initialized with zero values implicitly. By using zero
>>>> alpha values, the output rate of the PLL will be the same whether
>>>> alpha mode is enabled or not.
>>>>
>>>> Remove the superfluous initialization of the 'alpha_en_mask' member
>>>> to make it clear that enabling alpha mode is not required to get the
>>>> desired output rate.
>>>>
>>>> No functional changes, the initial rate of the PLL is the same both
>>>> before and after the patch.
>>>
>>> After going through DISPCC changes, I think the whole series is
>>> incorrect: these PLL can change the rate (e.g. to facilitate CPU
>>> frequency changes). Normally PLL ops do not check the alpha_en bit when
>>> changing the rate, so the driver might try to set the PLL to the rate
>>> which requires alpha value, while the alpha_en bit isn't set.
>>
>> Both clk_alpha_pll_stromer_set_rate() which is used for IPQ5018 (patch 1), and
>> clk_alpha_pll_stromer_plus_set_rate() used for IPQ5332 (patch 2) sets the
>> ALPHA_EN bit unconditionally.
>>
>> For the PLLs affected by the remaining patches, clk_alpha_pll_set_rate() is used
>> which also unconditionally sets the ALPHA_EN bit via __clk_alpha_pll_set_rate().
>>
>> I have created the patches after analysing the side effects of [1]. Due to the
>> bug described in that change, the clk_alpha_pll_configure() function in the
>> current kernel never sets the ALPHA_EN bit in the USER_CTL register. This means
>> that setting 'alpha_en_mask' in the configurations has no effect actually.
>>
>> So, if we assume that the affected PLLs are working correctly now, it is not
>> because the 'alpha_en_mask' is specifed in the configuration but due to the fact
>> that the set_rate op sets the ALPHA_EN bit.
>>
>> At least, I came to this after the analysis.
>
> Ack. Please mention in the commit message that it's safe to drop the
> alpha_en bit, because it will get reset by the set_rate function.
Ok.
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