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Message-ID: <6eeb92d0791a1c0c77d57c74c85990d1cdeb355d.camel@microchip.com>
Date: Tue, 29 Oct 2024 03:39:33 +0000
From: <Arun.Ramadoss@...rochip.com>
To: <andrew@...n.ch>, <olteanv@...il.com>, <davem@...emloft.net>,
<Woojung.Huh@...rochip.com>, <robh+dt@...nel.org>, <pabeni@...hat.com>,
<o.rempel@...gutronix.de>, <edumazet@...gle.com>, <f.fainelli@...il.com>,
<krzysztof.kozlowski+dt@...aro.org>, <conor+dt@...nel.org>, <kuba@...nel.org>
CC: <linux@...linux.org.uk>, <kernel@...gutronix.de>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<netdev@...r.kernel.org>, <UNGLinuxDriver@...rochip.com>
Subject: Re: [PATCH net-next v1 5/5] net: dsa: microchip: add support for side
MDIO interface in LAN937x
Hi Oleksij,
On Sat, 2024-10-26 at 08:35 +0200, Oleksij Rempel wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you
> know the content is safe
>
> diff --git a/drivers/net/dsa/microchip/lan937x_main.c
> b/drivers/net/dsa/microchip/lan937x_main.c
> index 824d9309a3d35..7dfd21d0d2843 100644
> --- a/drivers/net/dsa/microchip/lan937x_main.c
> +++ b/drivers/net/dsa/microchip/lan937x_main.c
> @@ -18,6 +18,47 @@
> #include "ksz9477.h"
> #include "lan937x.h"
>
> +static const u8 lan9370_phy_addr[] = {
> + [0] = 2, /* Port 1, T1 AFE0 */
> + [1] = 3, /* Port 2, T1 AFE1 */
> + [2] = 5, /* Port 3, T1 AFE3 */
> + [3] = 6, /* Port 4, T1 AFE4 */
> + [4] = U8_MAX, /* Port 5, RGMII 2 */
> +};
> +
Is it intentional to not to add support for lan9371 variant switch?
> +static const u8 lan9372_phy_addr[] = {
> + [0] = 2, /* Port 1, T1 AFE0 */
> + [1] = 3, /* Port 2, T1 AFE1 */
> + [2] = 5, /* Port 3, T1 AFE3 */
> + [3] = 8, /* Port 4, TX PHY */
> + [4] = U8_MAX, /* Port 5, RGMII 2 */
> + [5] = U8_MAX, /* Port 6, RGMII 1 */
> + [6] = 6, /* Port 7, T1 AFE4 */
> + [7] = 4, /* Port 8, T1 AFE2 */
> +};
> +
> +static const u8 lan9373_phy_addr[] = {
> + [0] = 2, /* Port 1, T1 AFE0 */
> + [1] = 3, /* Port 2, T1 AFE1 */
> + [2] = 5, /* Port 3, T1 AFE3 */
> + [3] = U8_MAX, /* Port 4, SGMII */
> + [4] = U8_MAX, /* Port 5, RGMII 2 */
> + [5] = U8_MAX, /* Port 6, RGMII 1 */
> + [6] = 6, /* Port 7, T1 AFE4 */
> + [7] = 4, /* Port 8, T1 AFE2 */
> +};
> +
> +static const u8 lan9374_phy_addr[] = {
> + [0] = 2, /* Port 1, T1 AFE0 */
> + [1] = 3, /* Port 2, T1 AFE1 */
> + [2] = 5, /* Port 3, T1 AFE3 */
> + [3] = 7, /* Port 4, T1 AFE5 */
> + [4] = U8_MAX, /* Port 5, RGMII 2 */
> + [5] = U8_MAX, /* Port 6, RGMII 1 */
> + [6] = 6, /* Port 7, T1 AFE4 */
> + [7] = 4, /* Port 8, T1 AFE2 */
> +};
> +
> static int lan937x_cfg(struct ksz_device *dev, u32 addr, u8 bits,
> bool set)
> {
> return regmap_update_bits(ksz_regmap_8(dev), addr, bits, set
> ? bits : 0);
> @@ -30,24 +71,97 @@ static int lan937x_port_cfg(struct ksz_device
> *dev, int port, int offset,
> bits, set ? bits : 0);
> }
>
>
> 2.39.5
>
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