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Message-ID: <ZyHjSCWGYLDu27ys@hovoldconsulting.com>
Date: Wed, 30 Oct 2024 08:42:00 +0100
From: Johan Hovold <johan@...nel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>
Cc: Qiang Yu <quic_qianyu@...cinc.com>, vkoul@...nel.org, kishon@...nel.org,
robh@...nel.org, andersson@...nel.org, konradybcio@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org, mturquette@...libre.com,
sboyd@...nel.org, abel.vesa@...aro.org, quic_msarkar@...cinc.com,
quic_devipriy@...cinc.com, dmitry.baryshkov@...aro.org,
kw@...ux.com, lpieralisi@...nel.org, neil.armstrong@...aro.org,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
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johan+linaro@...nel.org, stable@...r.kernel.org
Subject: Re: [PATCH v7 6/7] PCI: qcom: Disable ASPM L0s and remove BDF2SID
mapping config for X1E80100 SoC
On Wed, Oct 30, 2024 at 12:48:51PM +0530, Manivannan Sadhasivam wrote:
> On Wed, Oct 30, 2024 at 08:15:05AM +0100, Johan Hovold wrote:
> > Also, are there any Qualcomm platforms that actually support L0s?
> > Perhaps we should just disable it everywhere?
>
> Most of the mobile chipsets from Qcom support L0s. It is not supported only on
> the compute ones. So we cannot disable it everywhere.
>
> Again, it is not the hw issue but the PHY init sequence not tuned support L0s.
Right, this should be mentioned in the commit message.
Johan
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