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Message-ID: <c89d51a7-0477-471c-b4e9-0623e7b7ad67@kernel.org>
Date: Thu, 31 Oct 2024 16:43:22 +0100
From: Krzysztof Kozlowski <krzk@...nel.org>
To: Jan Petrous <jan.petrous@....nxp.com>
Cc: Maxime Coquelin <mcoquelin.stm32@...il.com>,
Alexandre Torgue <alexandre.torgue@...s.st.com>,
Jose Abreu <joabreu@...opsys.com>, "David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>, Vinod Koul <vkoul@...nel.org>,
Richard Cochran <richardcochran@...il.com>, Andrew Lunn <andrew@...n.ch>,
Heiner Kallweit <hkallweit1@...il.com>, Russell King
<linux@...linux.org.uk>, Shawn Guo <shawnguo@...nel.org>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>, Emil Renner Berthing <kernel@...il.dk>,
Minda Chen <minda.chen@...rfivetech.com>,
Nicolas Ferre <nicolas.ferre@...rochip.com>,
Claudiu Beznea <claudiu.beznea@...on.dev>,
Iyappan Subramanian <iyappan@...amperecomputing.com>,
Keyur Chudgar <keyur@...amperecomputing.com>,
Quan Nguyen <quan@...amperecomputing.com>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Giuseppe Cavallaro <peppe.cavallaro@...com>,
linux-stm32@...md-mailman.stormreply.com,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
netdev@...r.kernel.org, linux-arm-msm@...r.kernel.org, imx@...ts.linux.dev,
devicetree@...r.kernel.org, NXP S32 Linux Team <s32@....com>
Subject: Re: [PATCH v4 13/16] dt-bindings: net: Add DT bindings for DWMAC on
NXP S32G/R SoCs
On 31/10/2024 15:29, Jan Petrous wrote:
> On Tue, Oct 29, 2024 at 08:12:37AM +0100, Krzysztof Kozlowski wrote:
>> On Mon, Oct 28, 2024 at 09:24:55PM +0100, Jan Petrous (OSS) wrote:
>>> Add basic description for DWMAC ethernet IP on NXP S32G2xx, S32G3xx
>>> and S32R45 automotive series SoCs.
>>>
>>> Signed-off-by: Jan Petrous (OSS) <jan.petrous@....nxp.com>
>>> ---
>>> .../devicetree/bindings/net/nxp,s32-dwmac.yaml | 98 ++++++++++++++++++++++
>>> .../devicetree/bindings/net/snps,dwmac.yaml | 3 +
>>> 2 files changed, 101 insertions(+)
>>>
>>> diff --git a/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml
>>> new file mode 100644
>>> index 000000000000..b11ba3bc4c52
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/net/nxp,s32-dwmac.yaml
>>> @@ -0,0 +1,98 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +# Copyright 2021-2024 NXP
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/net/nxp,s32-dwmac.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: NXP S32G2xx/S32G3xx/S32R45 GMAC ethernet controller
>>> +
>>> +maintainers:
>>> + - Jan Petrous (OSS) <jan.petrous@....nxp.com>
>>> +
>>> +description:
>>> + This device is a Synopsys DWC IP, integrated on NXP S32G/R SoCs.
>>> +
>>> +properties:
>>> + compatible:
>>> + enum:
>>> + - nxp,s32g2-dwmac
>>> + - nxp,s32g3-dwmac
>>> + - nxp,s32r-dwmac
>>
>> Your driver says these are fully compatible, why this is not expressed
>> here?
>>
>
> They are compatible on current stage of driver implementation, the
> RGMII interface has no any difference. But later there shall be
> added SGMII and this provides some level of difference, at least
> from max-speed POV.
>
> The S32R allows higher speed (2G5) on SGMII, but S32G2/S32G3 has
> 1G as maximum.
So G2/G3 will work just fine but with lower speeds? That's the meaning
of compatibility.
Best regards,
Krzysztof
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