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Message-ID: <20241031115540.3f8edd1b@donnerap.manchester.arm.com>
Date: Thu, 31 Oct 2024 11:55:40 +0000
From: Andre Przywara <andre.przywara@....com>
To: Cody Eksal <masterr3c0rd@...chal.quest>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>, Chen-Yu Tsai <wens@...e.org>, Jernej
Skrabec <jernej.skrabec@...il.com>, Samuel Holland <samuel@...lland.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>, Kishon Vijay Abraham I
<kishon@...nel.org>, Maxime Ripard <mripard@...nel.org>, Michael Turquette
<mturquette@...libre.com>, Nishanth Menon <nm@...com>, "Rafael J. Wysocki"
<rafael@...nel.org>, Stephen Boyd <sboyd@...nel.org>, Vinod Koul
<vkoul@...nel.org>, Viresh Kumar <vireshk@...nel.org>, Viresh Kumar
<viresh.kumar@...aro.org>, Yangtao Li <tiny.windzz@...il.com>, Parthiban
<parthiban@...umiz.com>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 06/13] arm64: dts: allwinner: a100: add usb related
nodes
On Thu, 31 Oct 2024 04:02:19 -0300
Cody Eksal <masterr3c0rd@...chal.quest> wrote:
> From: Yangtao Li <frank@...winnertech.com>
>
> The Allwinner A100 has two HCI USB controllers, a OTG controller and a
> USB PHY. The PHY is compatible with that used by the D1, while the OTG
> controller is compatible with the A33. Add nodes for these to the base
> DTSI.
>
> Signed-off-by: Yangtao Li <frank@...winnertech.com>
> [masterr3c0rd@...chal.quest: fallback to a33-musb and d1-usb-phy, edited message]
> Signed-off-by: Cody Eksal <masterr3c0rd@...chal.quest>
Thanks for the changes, looks good to me now.
Reviewed-by: Andre Przywara <andre.przywara@....com>
Cheers,
Andre
> ---
> Changes in V2:
> - Fix sizes of reg definitions in usbphy
> - Move #phy-cells to the end of usbphy
> - Order nodes by MMIO address
> - Remove dr_mode
>
> .../arm64/boot/dts/allwinner/sun50i-a100.dtsi | 91 +++++++++++++++++++
> 1 file changed, 91 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
> index adb11b26045f..f6162a107641 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-a100.dtsi
> @@ -302,6 +302,97 @@ ths: thermal-sensor@...0400 {
> #thermal-sensor-cells = <1>;
> };
>
> + usb_otg: usb@...0000 {
> + compatible = "allwinner,sun50i-a100-musb",
> + "allwinner,sun8i-a33-musb";
> + reg = <0x05100000 0x0400>;
> + clocks = <&ccu CLK_BUS_OTG>;
> + resets = <&ccu RST_BUS_OTG>;
> + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
> + interrupt-names = "mc";
> + phys = <&usbphy 0>;
> + phy-names = "usb";
> + extcon = <&usbphy 0>;
> + status = "disabled";
> + };
> +
> + usbphy: phy@...0400 {
> + compatible = "allwinner,sun50i-a100-usb-phy",
> + "allwinner,sun20i-d1-usb-phy";
> + reg = <0x05100400 0x100>,
> + <0x05101800 0x100>,
> + <0x05200800 0x100>;
> + reg-names = "phy_ctrl",
> + "pmu0",
> + "pmu1";
> + clocks = <&ccu CLK_USB_PHY0>,
> + <&ccu CLK_USB_PHY1>;
> + clock-names = "usb0_phy",
> + "usb1_phy";
> + resets = <&ccu RST_USB_PHY0>,
> + <&ccu RST_USB_PHY1>;
> + reset-names = "usb0_reset",
> + "usb1_reset";
> + status = "disabled";
> + #phy-cells = <1>;
> + };
> +
> + ehci0: usb@...1000 {
> + compatible = "allwinner,sun50i-a100-ehci",
> + "generic-ehci";
> + reg = <0x05101000 0x100>;
> + interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_OHCI0>,
> + <&ccu CLK_BUS_EHCI0>,
> + <&ccu CLK_USB_OHCI0>;
> + resets = <&ccu RST_BUS_OHCI0>,
> + <&ccu RST_BUS_EHCI0>;
> + phys = <&usbphy 0>;
> + phy-names = "usb";
> + status = "disabled";
> + };
> +
> + ohci0: usb@...1400 {
> + compatible = "allwinner,sun50i-a100-ohci",
> + "generic-ohci";
> + reg = <0x05101400 0x100>;
> + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_OHCI0>,
> + <&ccu CLK_USB_OHCI0>;
> + resets = <&ccu RST_BUS_OHCI0>;
> + phys = <&usbphy 0>;
> + phy-names = "usb";
> + status = "disabled";
> + };
> +
> + ehci1: usb@...0000 {
> + compatible = "allwinner,sun50i-a100-ehci",
> + "generic-ehci";
> + reg = <0x05200000 0x100>;
> + interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_OHCI1>,
> + <&ccu CLK_BUS_EHCI1>,
> + <&ccu CLK_USB_OHCI1>;
> + resets = <&ccu RST_BUS_OHCI1>,
> + <&ccu RST_BUS_EHCI1>;
> + phys = <&usbphy 1>;
> + phy-names = "usb";
> + status = "disabled";
> + };
> +
> + ohci1: usb@...0400 {
> + compatible = "allwinner,sun50i-a100-ohci",
> + "generic-ohci";
> + reg = <0x05200400 0x100>;
> + interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&ccu CLK_BUS_OHCI1>,
> + <&ccu CLK_USB_OHCI1>;
> + resets = <&ccu RST_BUS_OHCI1>;
> + phys = <&usbphy 1>;
> + phy-names = "usb";
> + status = "disabled";
> + };
> +
> r_ccu: clock@...0000 {
> compatible = "allwinner,sun50i-a100-r-ccu";
> reg = <0x07010000 0x300>;
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