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Message-Id: <20241102-asahi-spi-dt-v1-4-7ac44c0a88f9@jannau.net>
Date: Sat, 02 Nov 2024 12:34:23 +0100
From: Janne Grunau via B4 Relay <devnull+j.jannau.net@...nel.org>
To: Hector Martin <marcan@...can.st>, Sven Peter <sven@...npeter.dev>,
Alyssa Rosenzweig <alyssa@...enzweig.io>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>
Cc: asahi@...ts.linux.dev, linux-arm-kernel@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Janne Grunau <j@...nau.net>
Subject: [PATCH 4/5] arm64: dts: apple: t600x: Add spi controller nodes
From: Janne Grunau <j@...nau.net>
Apple silicon devices have one or more SPI devices. Add device tree
nodes for all known controllers. The missing ones could be guessed and
tested with a little effort but since the devices expose no pins and
no new devices are expected there is no point in spending the effort.
SPI is used for spi-nor and input devices like keyboard, trackpad,
touchscreen and fingerprint reader. Only the spi-nor flash has upstream
drivers. Support for it will be added in a following commit.
Signed-off-by: Janne Grunau <j@...nau.net>
---
arch/arm64/boot/dts/apple/t600x-common.dtsi | 7 +++++++
arch/arm64/boot/dts/apple/t600x-die0.dtsi | 28 ++++++++++++++++++++++++++
arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi | 14 +++++++++++++
3 files changed, 49 insertions(+)
diff --git a/arch/arm64/boot/dts/apple/t600x-common.dtsi b/arch/arm64/boot/dts/apple/t600x-common.dtsi
index fa8ead69936366999786cdd4910266ee08b5ca7a..87dfc13d74171f62bf3087401918d9d41eaac560 100644
--- a/arch/arm64/boot/dts/apple/t600x-common.dtsi
+++ b/arch/arm64/boot/dts/apple/t600x-common.dtsi
@@ -362,6 +362,13 @@ clkref: clock-ref {
clock-output-names = "clkref";
};
+ clk_200m: clock-200m {
+ compatible = "fixed-clock";
+ #clock-cells = <0>;
+ clock-frequency = <200000000>;
+ clock-output-names = "clk_200m";
+ };
+
/*
* This is a fabulated representation of the input clock
* to NCO since we don't know the true clock tree.
diff --git a/arch/arm64/boot/dts/apple/t600x-die0.dtsi b/arch/arm64/boot/dts/apple/t600x-die0.dtsi
index b1c875e692c8fb9c0af46a23568a7b0cd720141b..e9b3140ba1a996eeb91b3f60470833060b632bd2 100644
--- a/arch/arm64/boot/dts/apple/t600x-die0.dtsi
+++ b/arch/arm64/boot/dts/apple/t600x-die0.dtsi
@@ -163,6 +163,34 @@ i2c5: i2c@...054000 {
status = "disabled";
};
+ spi1: spi@...104000 {
+ compatible = "apple,t6000-spi", "apple,spi";
+ reg = <0x3 0x9b104000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 0 1107 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clk_200m>;
+ pinctrl-0 = <&spi1_pins>;
+ pinctrl-names = "default";
+ power-domains = <&ps_spi1>;
+ status = "disabled";
+ };
+
+ spi3: spi@...10c000 {
+ compatible = "apple,t6000-spi", "apple,spi";
+ reg = <0x3 0x9b10c000 0x0 0x4000>;
+ interrupt-parent = <&aic>;
+ interrupts = <AIC_IRQ 0 1109 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&clkref>;
+ pinctrl-0 = <&spi3_pins>;
+ pinctrl-names = "default";
+ power-domains = <&ps_spi3>;
+ status = "disabled";
+ };
+
serial0: serial@...200000 {
compatible = "apple,s5l-uart";
reg = <0x3 0x9b200000 0x0 0x1000>;
diff --git a/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi b/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi
index b31f1a7a2b3fc36e7dfa480d27012d6d0fd56f97..1a994c3c1b79f088d685e13d1dc16e7d1e6546f4 100644
--- a/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi
+++ b/arch/arm64/boot/dts/apple/t600x-gpio-pins.dtsi
@@ -36,6 +36,20 @@ i2c5_pins: i2c5-pins {
<APPLE_PINMUX(101, 1)>;
};
+ spi1_pins: spi1-pins {
+ pinmux = <APPLE_PINMUX(10, 1)>,
+ <APPLE_PINMUX(11, 1)>,
+ <APPLE_PINMUX(32, 1)>,
+ <APPLE_PINMUX(33, 1)>;
+ };
+
+ spi3_pins: spi3-pins {
+ pinmux = <APPLE_PINMUX(52, 1)>,
+ <APPLE_PINMUX(53, 1)>,
+ <APPLE_PINMUX(54, 1)>,
+ <APPLE_PINMUX(55, 1)>;
+ };
+
pcie_pins: pcie-pins {
pinmux = <APPLE_PINMUX(0, 1)>,
<APPLE_PINMUX(1, 1)>,
--
2.47.0
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