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Message-ID: <CAAfSe-tk4iqeqxSbb8TmsauLC7X3KMtyM51cSdj2wXiC=-5-Yg@mail.gmail.com>
Date: Mon, 4 Nov 2024 09:29:17 +0800
From: Chunyan Zhang <zhang.lyra@...il.com>
To: Stanislav Jakubek <stano.jakubek@...il.com>
Cc: Uwe Kleine-König <ukleinek@...nel.org>, 
	Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Orson Zhai <orsonzhai@...il.com>, Baolin Wang <baolin.wang@...ux.alibaba.com>, 
	linux-pwm@...r.kernel.org, devicetree@...r.kernel.org, 
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] dt-bindings: pwm: sprd,ums512-pwm: convert to YAML

On Wed, 30 Oct 2024 at 17:36, Stanislav Jakubek <stano.jakubek@...il.com> wrote:
>
> Convert the Spreadtrum/Unisoc UMS512 PWM controller bindings to DT schema.
> Adjust filename to match compatible. Drop assigned-* properties as these
> should not be needed.
>
> Signed-off-by: Stanislav Jakubek <stano.jakubek@...il.com>
> ---
>  .../devicetree/bindings/pwm/pwm-sprd.txt      | 40 -----------
>  .../bindings/pwm/sprd,ums512-pwm.yaml         | 66 +++++++++++++++++++
>  2 files changed, 66 insertions(+), 40 deletions(-)
>  delete mode 100644 Documentation/devicetree/bindings/pwm/pwm-sprd.txt
>  create mode 100644 Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sprd.txt b/Documentation/devicetree/bindings/pwm/pwm-sprd.txt
> deleted file mode 100644
> index 87b206fd0618..000000000000
> --- a/Documentation/devicetree/bindings/pwm/pwm-sprd.txt
> +++ /dev/null
> @@ -1,40 +0,0 @@
> -Spreadtrum PWM controller
> -
> -Spreadtrum SoCs PWM controller provides 4 PWM channels.
> -
> -Required properties:
> -- compatible : Should be "sprd,ums512-pwm".
> -- reg: Physical base address and length of the controller's registers.
> -- clocks: The phandle and specifier referencing the controller's clocks.
> -- clock-names: Should contain following entries:
> -  "pwmn": used to derive the functional clock for PWM channel n (n range: 0 ~ 3).
> -  "enablen": for PWM channel n enable clock (n range: 0 ~ 3).
> -- #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of
> -  the cells format.
> -
> -Optional properties:
> -- assigned-clocks: Reference to the PWM clock entries.
> -- assigned-clock-parents: The phandle of the parent clock of PWM clock.
> -
> -Example:
> -       pwms: pwm@...60000 {
> -               compatible = "sprd,ums512-pwm";
> -               reg = <0 0x32260000 0 0x10000>;
> -               clock-names = "pwm0", "enable0",
> -                       "pwm1", "enable1",
> -                       "pwm2", "enable2",
> -                       "pwm3", "enable3";
> -               clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>,
> -                      <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>,
> -                      <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>,
> -                      <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>;
> -               assigned-clocks = <&aon_clk CLK_PWM0>,
> -                       <&aon_clk CLK_PWM1>,
> -                       <&aon_clk CLK_PWM2>,
> -                       <&aon_clk CLK_PWM3>;
> -               assigned-clock-parents = <&ext_26m>,
> -                       <&ext_26m>,
> -                       <&ext_26m>,
> -                       <&ext_26m>;
> -               #pwm-cells = <2>;
> -       };
> diff --git a/Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml b/Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml
> new file mode 100644
> index 000000000000..0344c2d99472
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/sprd,ums512-pwm.yaml
> @@ -0,0 +1,66 @@
> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/pwm/sprd,ums512-pwm.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Spreadtrum/Unisoc UMS512 PWM Controller
> +
> +maintainers:
> +  - Orson Zhai <orsonzhai@...il.com>
> +  - Baolin Wang <baolin.wang7@...il.com>
> +  - Chunyan Zhang <zhang.lyra@...il.com>

I've moved myself to Reviewer in sprd entry of MAINTAINERS, so,

Reviewed-by: Chunyan Zhang <zhang.lyra@...il.com>

Thanks,
Chunyan

> +
> +properties:
> +  compatible:
> +    const: sprd,ums512-pwm
> +
> +  reg:
> +    maxItems: 1
> +
> +  clocks:
> +    maxItems: 8
> +
> +  clock-names:
> +    items:
> +      - const: pwm0
> +      - const: enable0
> +      - const: pwm1
> +      - const: enable1
> +      - const: pwm2
> +      - const: enable2
> +      - const: pwm3
> +      - const: enable3
> +
> +  '#pwm-cells':
> +    const: 2
> +
> +required:
> +  - compatible
> +  - reg
> +  - clocks
> +  - clock-names
> +
> +allOf:
> +  - $ref: pwm.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> +  - |
> +    #include <dt-bindings/clock/sprd,ums512-clk.h>
> +
> +    pwm@...60000 {
> +      compatible = "sprd,ums512-pwm";
> +      reg = <0x32260000 0x10000>;
> +      clocks = <&aon_clk CLK_PWM0>, <&aonapb_gate CLK_PWM0_EB>,
> +               <&aon_clk CLK_PWM1>, <&aonapb_gate CLK_PWM1_EB>,
> +               <&aon_clk CLK_PWM2>, <&aonapb_gate CLK_PWM2_EB>,
> +               <&aon_clk CLK_PWM3>, <&aonapb_gate CLK_PWM3_EB>;
> +      clock-names = "pwm0", "enable0",
> +                    "pwm1", "enable1",
> +                    "pwm2", "enable2",
> +                    "pwm3", "enable3";
> +      #pwm-cells = <2>;
> +    };
> +...
> --
> 2.43.0
>

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