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Message-ID: <20241105185622.GEZypqVul2vRh6yDys@fat_crate.local>
Date: Tue, 5 Nov 2024 19:56:22 +0100
From: Borislav Petkov <bp@...en8.de>
To: Sean Christopherson <seanjc@...gle.com>
Cc: Borislav Petkov <bp@...nel.org>, X86 ML <x86@...nel.org>,
	Josh Poimboeuf <jpoimboe@...hat.com>,
	Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
	kvm@...r.kernel.org, LKML <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] x86/bugs: Adjust SRSO mitigation to new features

On Tue, Nov 05, 2024 at 10:10:20AM -0800, Sean Christopherson wrote:
> All of the actual maintainers.

Which maintainers do you mean? tip ones? If so, they're all shorted to
x86@...nel.org.

> AFAIK, Paolo doesn't subscribe to kvm@.

Oh boy, srsly?! I thought I'd reach the proper crowd with
kvm@...r.kernel.org...

> > Meh, I can split them if you really want me to.
> 
> I do.

Sure, next revision.

> What does the bit actually do?  I can't find any useful documentation, and the
> changelog is equally useless.


"Processors which set SRSO_MSR_FIX=1 support an MSR bit which mitigates SRSO
across guest/host boundaries. Software may enable this by setting bit
4 (BpSpecReduce) of MSR C001_102E. This bit can be set once during boot and
should be set identically across all processors in the system."

From: https://www.amd.com/content/dam/amd/en/documents/corporate/cr/speculative-return-stack-overflow-whitepaper.pdf

I think that's the only public info we have on that bit.

Thx.

-- 
Regards/Gruss,
    Boris.

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