linux-kernel - Re: [PATCH v2 1/2] arm64: dts: qcom: qcs615: add SDHC1 and SDHC2

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Message-ID: <ZyshSbJgLHTRaps1@cse-cd02-lnx.ap.qualcomm.com>
Date: Wed, 6 Nov 2024 15:56:57 +0800
From: Yuanjie Yang <quic_yuanjiey@...cinc.com>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>, <ulf.hansson@...aro.org>,
        <robh@...nel.org>, <krzk+dt@...nel.org>, <conor+dt@...nel.org>,
        <bhupesh.sharma@...aro.org>, <andersson@...nel.org>,
        <konradybcio@...nel.org>
CC: <linux-mmc@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>, <linux-arm-msm@...r.kernel.org>,
        <quic_tingweiz@...cinc.com>, <quic_yuanjiey@...cinc.com>
Subject: Re: [PATCH v2 1/2] arm64: dts: qcom: qcs615: add SDHC1 and SDHC2

On Wed, Nov 06, 2024 at 09:36:56AM +0200, Dmitry Baryshkov wrote:
> On Wed, Nov 06, 2024 at 03:23:42PM +0800, Yuanjie Yang wrote:
> > Add SDHC1 and SDHC2 support to the QCS615 Ride platform. The SDHC1
> > and SDHC2 of QCS615 are derived from SM6115. Include the relevant
> > binding documents accordingly.
> 
> Which binding documents?
Thanks, the binding documents is sdhci-msm.yaml.
I have modified this yaml patch in patch v1, and this yaml patch is
applied, so I remove this yaml patch in patch v2.
link:https://lore.kernel.org/all/CAPDyKFr-Gzd3Mzn+vN6DXO9C4Xrvpv4z5V2G_VRTzOa=89Fd3w@mail.gmail.com/

> > Additionally, configure SDHC1-related
> > and SDHC2-related opp, power, and interconnect settings in the device
> > tree.
> > 
> > Signed-off-by: Yuanjie Yang <quic_yuanjiey@...cinc.com>
> > ---
> >  arch/arm64/boot/dts/qcom/qcs615.dtsi | 198 +++++++++++++++++++++++++++
> >  1 file changed, 198 insertions(+)
> > 
> 
> -- 
> With best wishes
> Dmitry

Thanks,
Yuanjie