linux-kernel - Re: [RFC PATCH] x86/sev: Cleanup vc_handle

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Message-ID: <beaed4f3-58f8-b344-ef95-9f3c988ddd49@amd.com>
Date: Thu, 7 Nov 2024 12:02:46 +0100
From: "Gupta, Pankaj" <pankaj.gupta@....com>
To: "Borislav Petkov (AMD)" <bp@...en8.de>,
 Tom Lendacky <thomas.lendacky@....com>
Cc: x86-ml <x86@...nel.org>, lkml <linux-kernel@...r.kernel.org>,
 linux-coco@...ts.linux.dev
Subject: Re: [RFC PATCH] x86/sev: Cleanup vc_handle_msr()

On 11/6/2024 6:26 PM, Borislav Petkov (AMD) wrote:
> Hi,
> 
> I think we should clean this one up before in-flight patchsets make it more
> unreadable and in need for an even more cleanup.
> 
> ---
> Carve out the MSR_SVSM_CAA into a helper with the suggestion that
> upcoming future users should do the same. Rename that silly exit_info_1
> into what it actually means in this function - whether the MSR access is
> a read or a write.
> 
> No functional changes.
> 
> Signed-off-by: Borislav Petkov (AMD) <bp@...en8.de>

LGTM

With minor comments from Tom,

Reviewed-by: Pankaj Gupta <pankaj.gupta@....com>

> ---
>   arch/x86/coco/sev/core.c | 34 +++++++++++++++++++---------------
>   1 file changed, 19 insertions(+), 15 deletions(-)
> 
> diff --git a/arch/x86/coco/sev/core.c b/arch/x86/coco/sev/core.c
> index 97f445f3366a..1efb4a5c5ab3 100644
> --- a/arch/x86/coco/sev/core.c
> +++ b/arch/x86/coco/sev/core.c
> @@ -1406,35 +1406,39 @@ int __init sev_es_efi_map_ghcbs(pgd_t *pgd)
>   	return 0;
>   }
>   
> +/* Writes to the SVSM CAA MSR are ignored */
> +static enum es_result __vc_handle_msr_caa(struct pt_regs *regs, bool write)
> +{
> +	if (write)
> +		return ES_OK;
> +
> +	regs->ax = lower_32_bits(this_cpu_read(svsm_caa_pa));
> +	regs->dx = upper_32_bits(this_cpu_read(svsm_caa_pa));
> +
> +	return ES_OK;
> +}
> +
>   static enum es_result vc_handle_msr(struct ghcb *ghcb, struct es_em_ctxt *ctxt)
>   {
>   	struct pt_regs *regs = ctxt->regs;
>   	enum es_result ret;
> -	u64 exit_info_1;
> +	bool write;
>   
>   	/* Is it a WRMSR? */
> -	exit_info_1 = (ctxt->insn.opcode.bytes[1] == 0x30) ? 1 : 0;
> -
> -	if (regs->cx == MSR_SVSM_CAA) {
> -		/* Writes to the SVSM CAA msr are ignored */
> -		if (exit_info_1)
> -			return ES_OK;
> -
> -		regs->ax = lower_32_bits(this_cpu_read(svsm_caa_pa));
> -		regs->dx = upper_32_bits(this_cpu_read(svsm_caa_pa));
> +	write = ctxt->insn.opcode.bytes[1] == 0x30;
>   
> -		return ES_OK;
> -	}
> +	if (regs->cx == MSR_SVSM_CAA)
> +		return __vc_handle_msr_caa(regs, write);
>   
>   	ghcb_set_rcx(ghcb, regs->cx);
> -	if (exit_info_1) {
> +	if (write) {
>   		ghcb_set_rax(ghcb, regs->ax);
>   		ghcb_set_rdx(ghcb, regs->dx);
>   	}
>   
> -	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, exit_info_1, 0);
> +	ret = sev_es_ghcb_hv_call(ghcb, ctxt, SVM_EXIT_MSR, !!write, 0);
>   
> -	if ((ret == ES_OK) && (!exit_info_1)) {
> +	if ((ret == ES_OK) && (!write)) {
>   		regs->ax = ghcb->save.rax;
>   		regs->dx = ghcb->save.rdx;
>   	}