linux-kernel - Re: [PATCH v2 2/2] ARM: implement cacheinfo support

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Message-ID: <CACRpkdZ1Pkd_iKDNE+m_R4Anbdv=dcg77oC95yqaAM_dp0BRYA@mail.gmail.com>
Date: Thu, 7 Nov 2024 14:55:01 +0100
From: Linus Walleij <linus.walleij@...aro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
Cc: Sudeep Holla <sudeep.holla@....com>, Ard Biesheuvel <ardb@...nel.org>, 
	Russell King <linux@...linux.org.uk>, linux-arm-kernel@...ts.infradead.org, 
	linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org, 
	Bjorn Andersson <andersson@...nel.org>, Konrad Dybcio <konradybcio@...nel.org>, 
	Arnd Bergmann <arnd@...db.de>
Subject: Re: [PATCH v2 2/2] ARM: implement cacheinfo support

On Mon, Oct 14, 2024 at 3:56 PM Dmitry Baryshkov
<dmitry.baryshkov@...aro.org> wrote:

> On ARMv7 / v7m machines read CTR and CLIDR registers to provide
> information regarding the cache topology. Earlier machines should
> describe full cache topology in the device tree.
>
> Note, this follows the ARM64 cacheinfo support and provides only minimal
> support required to bootstrap cache info. All useful properties should
> be decribed in Device Tree.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>

It's really neat actually!

Reviewed-by: Linus Walleij <linus.walleij@...aro.org>

Yours,
Linus Walleij