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Message-ID: <20241109133317.0616252d@jic23-huawei>
Date: Sat, 9 Nov 2024 13:33:17 +0000
From: Jonathan Cameron <jic23@...nel.org>
To: Jean-Baptiste Maneyrol via B4 Relay
 <devnull+jean-baptiste.maneyrol.tdk.com@...nel.org>
Cc: jean-baptiste.maneyrol@....com, Lars-Peter Clausen <lars@...afoo.de>,
 Jean-Baptiste Maneyrol <jmaneyrol@...ensense.com>, Jonathan Cameron
 <Jonathan.Cameron@...wei.com>, linux-iio@...r.kernel.org,
 linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH] iio: imu: inv_icm42600: fix spi burst write not
 supported

On Thu, 07 Nov 2024 22:20:06 +0100
Jean-Baptiste Maneyrol via B4 Relay <devnull+jean-baptiste.maneyrol.tdk.com@...nel.org> wrote:

> From: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@....com>
> 
> Burst write with SPI is not working for all icm42600 chips. It was
> only used for setting user offsets with regmap_bulk_write.
> 
> Allow tweak of common regmap_config for using only single write for
> spi.
> 
> Fixes: 9f9ff91b775b ("iio: imu: inv_icm42600: add SPI driver for inv_icm42600 driver")
> Cc: stable@...r.kernel.org
> Signed-off-by: Jean-Baptiste Maneyrol <jean-baptiste.maneyrol@....com>
Hi Jean-Baptiste,

You need to copy the regmap before modifying.
Otherwise the case were someone has two IMUs only one of which needs this
will set it for both.

Probably better to just have two regmap_config const structures and pick between
them based on the compatible.

Jonathan

> ---
>  drivers/iio/imu/inv_icm42600/inv_icm42600.h      | 2 +-
>  drivers/iio/imu/inv_icm42600/inv_icm42600_core.c | 2 +-
>  drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c  | 3 +++
>  3 files changed, 5 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600.h b/drivers/iio/imu/inv_icm42600/inv_icm42600.h
> index 3a07e43e4cf154f3107c015c30248330d8e677f8..36a3b0795fb7d6cb0c178fadd93896fbc346ba0d 100644
> --- a/drivers/iio/imu/inv_icm42600/inv_icm42600.h
> +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600.h
> @@ -402,7 +402,7 @@ struct inv_icm42600_sensor_state {
>  
>  typedef int (*inv_icm42600_bus_setup)(struct inv_icm42600_state *);
>  
> -extern const struct regmap_config inv_icm42600_regmap_config;
> +extern struct regmap_config inv_icm42600_regmap_config;
>  extern const struct dev_pm_ops inv_icm42600_pm_ops;
>  
>  const struct iio_mount_matrix *
> diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c b/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
> index 93b5d7a3339ccff16b21bf6c40ed7b2311317cf4..680373f6267b37d386e4e7bda543ba4efe97e66b 100644
> --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
> +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_core.c
> @@ -74,7 +74,7 @@ static const struct regmap_access_table inv_icm42600_regmap_rd_noinc_accesses[]
>  	},
>  };
>  
> -const struct regmap_config inv_icm42600_regmap_config = {
> +struct regmap_config inv_icm42600_regmap_config = {
>  	.name = "inv_icm42600",
>  	.reg_bits = 8,
>  	.val_bits = 8,
> diff --git a/drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c b/drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c
> index 3b6d05fce65d544524b25299c6d342af92cfd1e0..73cacfd157a4538ae8c9d1c8d97157afa28aa672 100644
> --- a/drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c
> +++ b/drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c
> @@ -59,6 +59,9 @@ static int inv_icm42600_probe(struct spi_device *spi)
>  		return -EINVAL;
>  	chip = (uintptr_t)match;
>  
> +	/* spi doesn't support burst write */
> +	inv_icm42600_regmap_config.use_single_write = true;
> +
>  	regmap = devm_regmap_init_spi(spi, &inv_icm42600_regmap_config);
>  	if (IS_ERR(regmap))
>  		return PTR_ERR(regmap);
> 
> ---
> base-commit: c9f8285ec18c08fae0de08835eb8e5953339e664
> change-id: 20241107-inv-icm42600-fix-spi-burst-write-not-supported-efe78d7379a5
> 
> Best regards,


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