linux-kernel - Re: [PATCH] clk: sunxi-ng: a100: enable MMC clock reparenting

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Message-ID: <CAGb2v663xMyiEx4BpPkuRew9t8fAgbz6EENEj--8Y57E87Lgcg@mail.gmail.com>
Date: Sun, 10 Nov 2024 00:02:30 +0800
From: Chen-Yu Tsai <wens@...e.org>
To: Cody Eksal <masterr3c0rd@...chal.quest>
Cc: Michael Turquette <mturquette@...libre.com>, Stephen Boyd <sboyd@...nel.org>, 
	Jernej Skrabec <jernej.skrabec@...il.com>, Samuel Holland <samuel@...lland.org>, 
	Yangtao Li <frank@...winnertech.com>, Maxime Ripard <mripard@...nel.org>, 
	Rob Herring <robh@...nel.org>, linux-clk@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, linux-sunxi@...ts.linux.dev, 
	linux-kernel@...r.kernel.org, Parthiban <parthiban@...umiz.com>, 
	Andre Przywara <andre.przywara@....com>, stable@...r.kernel.org
Subject: Re: [PATCH] clk: sunxi-ng: a100: enable MMC clock reparenting

On Sat, Nov 9, 2024 at 8:38 AM Cody Eksal <masterr3c0rd@...chal.quest> wrote:
>
> While testing the MMC nodes proposed in [1], it was noted that mmc0/1
> would fail to initialize, with "mmc: fatal err update clk timeout" in
> the kernel logs. A closer look at the clock definitions showed that the MMC
> MPs had the "CLK_SET_RATE_NO_REPARENT" flag set. No reason was given for
> adding this flag in the first place, and its original purpose is unknown,
> but it doesn't seem to make sense and results in severe limitations to MMC
> speeds. Thus, remove this flag from the 3 MMC MPs.
>
> [1] https://msgid.link/20241024170540.2721307-10-masterr3c0rd@epochal.quest
>
> Fixes: fb038ce4db55 ("clk: sunxi-ng: add support for the Allwinner A100 CCU")
> Cc: stable@...r.kernel.org
> Signed-off-by: Cody Eksal <masterr3c0rd@...chal.quest>
> Reviewed-by: Andre Przywara <andre.przywara@....com>

You should still keep the version number from the original series if
resending or increment it if changes were made.

ChenYu

> ---
>  drivers/clk/sunxi-ng/ccu-sun50i-a100.c | 6 +++---
>  1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/clk/sunxi-ng/ccu-sun50i-a100.c b/drivers/clk/sunxi-ng/ccu-sun50i-a100.c
> index bbaa82978716..a59e420b195d 100644
> --- a/drivers/clk/sunxi-ng/ccu-sun50i-a100.c
> +++ b/drivers/clk/sunxi-ng/ccu-sun50i-a100.c
> @@ -436,7 +436,7 @@ static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc0_clk, "mmc0", mmc_parents, 0x830,
>                                           24, 2,        /* mux */
>                                           BIT(31),      /* gate */
>                                           2,            /* post-div */
> -                                         CLK_SET_RATE_NO_REPARENT);
> +                                         0);
>
>  static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc1_clk, "mmc1", mmc_parents, 0x834,
>                                           0, 4,         /* M */
> @@ -444,7 +444,7 @@ static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc1_clk, "mmc1", mmc_parents, 0x834,
>                                           24, 2,        /* mux */
>                                           BIT(31),      /* gate */
>                                           2,            /* post-div */
> -                                         CLK_SET_RATE_NO_REPARENT);
> +                                         0);
>
>  static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc2_clk, "mmc2", mmc_parents, 0x838,
>                                           0, 4,         /* M */
> @@ -452,7 +452,7 @@ static SUNXI_CCU_MP_WITH_MUX_GATE_POSTDIV(mmc2_clk, "mmc2", mmc_parents, 0x838,
>                                           24, 2,        /* mux */
>                                           BIT(31),      /* gate */
>                                           2,            /* post-div */
> -                                         CLK_SET_RATE_NO_REPARENT);
> +                                         0);
>
>  static SUNXI_CCU_GATE(bus_mmc0_clk, "bus-mmc0", "ahb3", 0x84c, BIT(0), 0);
>  static SUNXI_CCU_GATE(bus_mmc1_clk, "bus-mmc1", "ahb3", 0x84c, BIT(1), 0);
> --
> 2.47.0
>
>