linux-kernel - RE: [PATCH v2 24/25] arm64: dts: renesas: rzg3s-smarc: Enable SSI3

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Message-ID:
 <TYCPR01MB113329FE5E9E610BEF45DC001865F2@TYCPR01MB11332.jpnprd01.prod.outlook.com>
Date: Sun, 10 Nov 2024 08:54:23 +0000
From: Biju Das <biju.das.jz@...renesas.com>
To: Claudiu.Beznea <claudiu.beznea@...on.dev>, "geert+renesas@...der.be"
	<geert+renesas@...der.be>, "mturquette@...libre.com"
	<mturquette@...libre.com>, "sboyd@...nel.org" <sboyd@...nel.org>,
	"robh@...nel.org" <robh@...nel.org>, "krzk+dt@...nel.org"
	<krzk+dt@...nel.org>, "conor+dt@...nel.org" <conor+dt@...nel.org>, Prabhakar
 Mahadev Lad <prabhakar.mahadev-lad.rj@...renesas.com>, "lgirdwood@...il.com"
	<lgirdwood@...il.com>, "broonie@...nel.org" <broonie@...nel.org>,
	"magnus.damm@...il.com" <magnus.damm@...il.com>, "linus.walleij@...aro.org"
	<linus.walleij@...aro.org>, "perex@...ex.cz" <perex@...ex.cz>,
	"tiwai@...e.com" <tiwai@...e.com>, "p.zabel@...gutronix.de"
	<p.zabel@...gutronix.de>
CC: "linux-renesas-soc@...r.kernel.org" <linux-renesas-soc@...r.kernel.org>,
	"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
	"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	"linux-sound@...r.kernel.org" <linux-sound@...r.kernel.org>,
	"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>, Claudiu.Beznea
	<claudiu.beznea@...on.dev>, Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
Subject: RE: [PATCH v2 24/25] arm64: dts: renesas: rzg3s-smarc: Enable SSI3

Hi Claudiu,

Thanks for the patch.


> -----Original Message-----
> From: Claudiu <claudiu.beznea@...on.dev>
> Sent: 08 November 2024 10:50
> Subject: [PATCH v2 24/25] arm64: dts: renesas: rzg3s-smarc: Enable SSI3
> 
> From: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> 
> Enable SSI3.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@...renesas.com>
> ---
> 
> Changes in v2:
> - none
> 
>  arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi | 26 ++++++++++++++++++++
>  1 file changed, 26 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg3s-
> smarc.dtsi
> index 4aa99814b808..6dd439e68bd4 100644
> --- a/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
> +++ b/arch/arm64/boot/dts/renesas/rzg3s-smarc.dtsi
> @@ -64,6 +64,11 @@ vccq_sdhi1: regulator-vccq-sdhi1 {
>  	};
>  };
> 

&audio_clk1 {
       assigned-clocks = <&versa3 xx>;
       clock-frequency = <11289600>;
};

Maybe add audio_clk1, so that it described properly in clock tree??

Cheers,
Biju

> +&audio_clk2 {
> +	clock-frequency = <12288000>;
> +	status = "okay";
> +};
> +
>  &i2c0 {
>  	status = "okay";
> 
> @@ -94,6 +99,11 @@ da7212: codec@1a {
>  };
> 
>  &pinctrl {
> +	audio_clock_pins: audio-clock {
> +		pins = "AUDIO_CLK1", "AUDIO_CLK2";
> +		input-enable;
> +	};
> +
>  	key-1-gpio-hog {
>  		gpio-hog;
>  		gpios = <RZG2L_GPIO(18, 0) GPIO_ACTIVE_LOW>; @@ -151,6 +161,13 @@ cd {
>  			pinmux = <RZG2L_PORT_PINMUX(0, 2, 1)>; /* SD1_CD */
>  		};
>  	};
> +
> +	ssi3_pins: ssi3 {
> +		pinmux = <RZG2L_PORT_PINMUX(18, 2, 8)>, /* BCK */
> +			 <RZG2L_PORT_PINMUX(18, 3, 8)>, /* RCK */
> +			 <RZG2L_PORT_PINMUX(18, 4, 8)>, /* TXD */
> +			 <RZG2L_PORT_PINMUX(18, 5, 8)>; /* RXD */
> +	};
>  };
> 
>  &scif0 {
> @@ -171,3 +188,12 @@ &sdhi1 {
>  	max-frequency = <125000000>;
>  	status = "okay";
>  };
> +
> +&ssi3 {
> +	clocks = <&cpg CPG_MOD R9A08G045_SSI3_PCLK2>,
> +		 <&cpg CPG_MOD R9A08G045_SSI3_PCLK_SFR>,
> +		 <&versa3 2>, <&audio_clk2>;
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&ssi3_pins>, <&audio_clock_pins>;
> +	status = "okay";
> +};
> --
> 2.39.2