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Message-ID: <434b2dab17050643badc60c50b361153631b7cdd.camel@codeconstruct.com.au>
Date: Tue, 12 Nov 2024 10:23:24 +1030
From: Andrew Jeffery <andrew@...econstruct.com.au>
To: Peter Yin <peteryin.openbmc@...il.com>, Rob Herring
<robh+dt@...nel.org>, Krzysztof Kozlowski
<krzysztof.kozlowski+dt@...aro.org>, Conor Dooley <conor+dt@...nel.org>,
Joel Stanley <joel@....id.au>, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-aspeed@...ts.ozlabs.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v1 3/5] ARM: dts: aspeed: Harma: Revise GPIO line name
Hi Peter,
On Mon, 2024-11-11 at 17:43 +0800, Peter Yin wrote:
> Add:
> "ac-power-button",
> "asic0-card-type-detection0-n"
> "asic0-card-type-detection1-n"
> "asic0-card-type-detection2-n"
>
> "cpu0-prochot-alert",
> "cpu0-thermtrip-alert",
>
> "irq-uv-detect-alert",
> "irq-hsc-alert",
>
> "uart-switch-button"
> "uart-switch-lsb"
> "uart-switch-msb"
>
> "leakage-detect-alert",
>
> "power-card-enable",
> "power-fault-n",
> "power-hsc-good",
> "power-chassis-good"
> "presence-post-card",
> "presence-cmm"
> "pvdd11-ocp-alert"
>
> "reset-control-cmos-clear"
> "reset-cause-pcie",
> "reset-cause-platrst",
>
> "P0_I3C_APML_ALERT_L",
Rather than list the identifiers that are already contained in the
patch, can you please discuss what functionality these identifiers
enable, how different functions are related, and why this must all be
done in one patch?
>
> Rename:
> "power-cpu-good" to "host0-ready",
> "host-ready-n" to "post-end-n
On the other-hand, explicitly calling out these changes is helpful, but
please also discuss the motivation and impact.
Andrew
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