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Message-ID: <ZzS0-5U-4nmXW_8R@hovoldconsulting.com>
Date: Wed, 13 Nov 2024 15:17:31 +0100
From: Johan Hovold <johan@...nel.org>
To: Qiang Yu <quic_qianyu@...cinc.com>
Cc: andersson@...nel.org, konradybcio@...nel.org, robh@...nel.org,
krzk+dt@...nel.org, conor+dt@...nel.org,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org, quic_cang@...cinc.com,
quic_mrana@...cinc.com, stable@...r.kernel.org
Subject: Re: [PATCH 1/1] arm64: dts: qcom: x1e80100: Fix up BAR space size
for PCIe6a
On Wed, Nov 13, 2024 at 12:05:08AM -0800, Qiang Yu wrote:
> As per memory map table, the region for PCIe6a is 64MByte. Hence, set the
> size of 32 bit non-prefetchable memory region beginning on address
> 0x70300000 as 0x3d00000 so that BAR space assigned to BAR registers can be
> allocated from 0x70300000 to 0x74000000.
>
> Fixes: 7af141850012 ("arm64: dts: qcom: x1e80100: Fix up BAR spaces")
> Cc: stable@...r.kernel.org
> Signed-off-by: Qiang Yu <quic_qianyu@...cinc.com>
Thanks for the fix.
Reviewed-by: Johan Hovold <johan+linaro@...nel.org>
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