linux-kernel - Re: [PATCH v2 1/4] cpufreq: mediatek: CCI support SoC , the transition

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Message-ID: <9f9a969f-6ce5-4e6c-89bd-51fe121db693@collabora.com>
Date: Thu, 14 Nov 2024 11:22:45 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Mark Tseng <chun-jen.tseng@...iatek.com>,
 "Rafael J . Wysocki" <rafael@...nel.org>,
 Viresh Kumar <viresh.kumar@...aro.org>,
 MyungJoo Ham <myungjoo.ham@...sung.com>,
 Kyungmin Park <kyungmin.park@...sung.com>,
 Chanwoo Choi <cw00.choi@...sung.com>,
 Matthias Brugger <matthias.bgg@...il.com>
Cc: linux-pm@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org,
 Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v2 1/4] cpufreq: mediatek: CCI support SoC , the
 transition_delay set to 10 ms

Il 08/11/24 07:39, Mark Tseng ha scritto:
> SoC with CCI architecture should set transition_delay to 10 ms because
> cpufreq need to call devfreq notifier in async mode. if delay less than
> 10 ms, it may get wrong OPP-level in devfreq passive governor.
> 

This means that MediaTek SoCs can change their CPU frequency once every
10 milliseconds?!?!?!

I don't think that's really the case.

Besides, are you aware that this will have a *huge* impact on either power
consumption or performance?
We're going from a bunch of microseconds to *multiple* milliseconds here.

Regards,
Angelo