linux-kernel - [PATCH 0/3] PCI: dwc: Add ECAM support with iATU configuration

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Message-ID: <20241117-ecam-v1-0-6059faf38d07@quicinc.com>
Date: Sun, 17 Nov 2024 03:30:17 +0530
From: Krishna chaitanya chundru <quic_krichai@...cinc.com>
To: <cros-qcom-dts-watchers@...omium.org>,
        Bjorn Andersson
	<andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring
	<robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
	<conor+dt@...nel.org>, Jingoo Han <jingoohan1@...il.com>,
        "Manivannan
 Sadhasivam" <manivannan.sadhasivam@...aro.org>,
        Lorenzo Pieralisi
	<lpieralisi@...nel.org>,
        Krzysztof Wilczyński
	<kw@...ux.com>,
        Bjorn Helgaas <bhelgaas@...gle.com>
CC: <quic_vbadigan@...cinc.com>, <quic_ramkri@...cinc.com>,
        <quic_nitegupt@...cinc.com>, <quic_skananth@...cinc.com>,
        <quic_vpernami@...cinc.com>, <quic_mrana@...cinc.com>,
        <mmareddy@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
        <devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <linux-pci@...r.kernel.org>,
        Krishna chaitanya chundru
	<quic_krichai@...cinc.com>
Subject: [PATCH 0/3] PCI: dwc: Add ECAM support with iATU configuration

The current implementation requires iATU for every configuration
space access which increases latency & cpu utilization.

Configuring iATU in config shift mode enables ECAM feature to access the
config space, which avoids iATU configuration for every config access.

Add cfg_shft_mode into struct dw_pcie_ob_atu_cfg to enable config shift mode.

As DBI comes under config space, this avoids remapping of DBI space
separately. Instead, it uses the mapped config space address returned from
ECAM initialization. Change the order of dw_pcie_get_resources() execution
to acheive this.

Introduce new ecam_init() function op for the clients to use configure
after ecam init has done.

Enable the ECAM feature if the config space size is equal to size required
to represent number of buses in the bus range property.

The ELBI and iATU registers also fall after the DBI space, so use the cfg
win returned from the ecam init to map these regions instead of doing the
ioremap again. iATU starts after 4KB of dbi address and ELBI starts at
offset 0xf20 from dbi.

On bus 0, we have only the root complex. Any access other than that should
not go out of the link and should return all F's. Since the IATU is
configured for bus 1 onwards, block the transactions for bus 0:0:1 to
0:31:7 (i.e., from dbi_base + 4KB to dbi_base + 1MB) from going outside the
link through ecam blocker through parf registers.

Increase the configuration size to 256MB as required by the ECAM feature
and also move config space, dbi, iatu to upper space and use lower space
entirely for BAR region.

Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
---
---
Krishna chaitanya chundru (3):
      arm64: dts: qcom: sc7280: Increase config size to 256MB for ECAM feature
      PCI: dwc: Add ECAM support with iATU configuration
      PCI: qcom: Enable ECAM feature based on config size

 arch/arm64/boot/dts/qcom/sc7280.dtsi              |  12 +--
 drivers/pci/controller/dwc/pcie-designware-host.c | 114 ++++++++++++++++++----
 drivers/pci/controller/dwc/pcie-designware.c      |   2 +-
 drivers/pci/controller/dwc/pcie-designware.h      |   6 ++
 drivers/pci/controller/dwc/pcie-qcom.c            | 104 +++++++++++++++++++-
 5 files changed, 208 insertions(+), 30 deletions(-)
---
base-commit: 2f87d0916ce0d2925cedbc9e8f5d6291ba2ac7b2
change-id: 20241016-ecam-b1f5febcfc3c

Best regards,
-- 
Krishna chaitanya chundru <quic_krichai@...cinc.com>