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Message-ID: <20241117-ecam-v1-1-6059faf38d07@quicinc.com>
Date: Sun, 17 Nov 2024 03:30:18 +0530
From: Krishna chaitanya chundru <quic_krichai@...cinc.com>
To: <cros-qcom-dts-watchers@...omium.org>,
Bjorn Andersson
<andersson@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, Rob Herring
<robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>, Jingoo Han <jingoohan1@...il.com>,
"Manivannan
Sadhasivam" <manivannan.sadhasivam@...aro.org>,
Lorenzo Pieralisi
<lpieralisi@...nel.org>,
Krzysztof WilczyĆski
<kw@...ux.com>,
Bjorn Helgaas <bhelgaas@...gle.com>
CC: <quic_vbadigan@...cinc.com>, <quic_ramkri@...cinc.com>,
<quic_nitegupt@...cinc.com>, <quic_skananth@...cinc.com>,
<quic_vpernami@...cinc.com>, <quic_mrana@...cinc.com>,
<mmareddy@...cinc.com>, <linux-arm-msm@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-pci@...r.kernel.org>,
Krishna chaitanya chundru
<quic_krichai@...cinc.com>
Subject: [PATCH 1/3] arm64: dts: qcom: sc7280: Increase config size to
256MB for ECAM feature
Increase the configuration size to 256MB as required by the ECAM feature.
And also move config space, DBI, ELBI, IATU to upper PCIe region and use
lower PCIe region entierly for BAR region.
Signed-off-by: Krishna chaitanya chundru <quic_krichai@...cinc.com>
---
arch/arm64/boot/dts/qcom/sc7280.dtsi | 12 ++++++------
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi
index 3d8410683402..a7e3d3e9d034 100644
--- a/arch/arm64/boot/dts/qcom/sc7280.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi
@@ -2196,10 +2196,10 @@ wifi: wifi@...10040 {
pcie1: pcie@...8000 {
compatible = "qcom,pcie-sc7280";
reg = <0 0x01c08000 0 0x3000>,
- <0 0x40000000 0 0xf1d>,
- <0 0x40000f20 0 0xa8>,
- <0 0x40001000 0 0x1000>,
- <0 0x40100000 0 0x100000>;
+ <4 0x00000000 0 0xf1d>,
+ <4 0x00000f20 0 0xa8>,
+ <4 0x10000000 0 0x1000>,
+ <4 0x00000000 0 0x10000000>;
reg-names = "parf", "dbi", "elbi", "atu", "config";
device_type = "pci";
@@ -2210,8 +2210,8 @@ pcie1: pcie@...8000 {
#address-cells = <3>;
#size-cells = <2>;
- ranges = <0x01000000 0x0 0x00000000 0x0 0x40200000 0x0 0x100000>,
- <0x02000000 0x0 0x40300000 0x0 0x40300000 0x0 0x1fd00000>;
+ ranges = <0x01000000 0x0 0x00000000 0x0 0x40000000 0x0 0x100000>,
+ <0x02000000 0x0 0x40100000 0x0 0x40100000 0x0 0x1ff00000>;
interrupts = <GIC_SPI 307 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>,
--
2.34.1
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