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Message-ID: <e1aa2b69-5c40-44a5-b0b5-2a262bcc72f3@collabora.com>
Date: Wed, 20 Nov 2024 12:55:46 +0100
From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
To: Friday Yang <friday.yang@...iatek.com>,
Philipp Zabel <p.zabel@...gutronix.de>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
<conor+dt@...nel.org>, Matthias Brugger <matthias.bgg@...il.com>
Cc: devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-mediatek@...ts.infradead.org,
Project_Global_Chrome_Upstream_Group@...iatek.com
Subject: Re: [PATCH v2 1/2] dt-bindings: reset: mediatek: Add mt8188 SMI reset
control binding
Il 20/11/24 07:32, Friday Yang ha scritto:
> From: "Friday Yang" <friday.yang@...iatek.com>
>
> To support SMI clamp and reset operation in genpd callback, add
> SMI LARB reset controller in the bindings. Add index in
> mt8188-resets.h to query the reset signal in the SMI reset
> control driver.
>
> Signed-off-by: Friday Yang <friday.yang@...iatek.com>
> ---
> .../bindings/reset/mediatek,smi-reset.yaml | 53 +++++++++++++++++++
> include/dt-bindings/reset/mt8188-resets.h | 11 ++++
> 2 files changed, 64 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/reset/mediatek,smi-reset.yaml
>
> diff --git a/Documentation/devicetree/bindings/reset/mediatek,smi-reset.yaml b/Documentation/devicetree/bindings/reset/mediatek,smi-reset.yaml
> new file mode 100644
> index 000000000000..77a6197a9846
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/reset/mediatek,smi-reset.yaml
> @@ -0,0 +1,53 @@
> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
> +# Copyright (c) 2024 MediaTek Inc.
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/reset/mediatek,smi-reset.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: MediaTek SMI Reset Controller
> +
> +maintainers:
> + - Friday Yang <friday.yang@...iatek.com>
> +
> +description: |
> + This reset controller node is used to perform reset management
> + of SMI larbs on MediaTek platform. It is used to implement various
> + reset functions required when SMI larbs apply clamp operation.
> +
> + For list of all valid reset indices see
> + <dt-bindings/reset/mt8188-resets.h> for MT8188.
> +
> +properties:
> + compatible:
> + enum:
> + - mediatek,mt8188-smi-reset
> +
> + "#reset-cells":
> + const: 1
> + description:
> + The cell should be the device ID. SMI reset controller driver could
> + query the reset signal of each SMI larb by device ID.
> +
> + mediatek,larb-rst:
> + $ref: /schemas/types.yaml#/definitions/phandle
> + description:
> + Phandle of each subsys clock controller. SMI larbs are located in
> + these subsys. SMI needs to parse the node of each subsys clock
> + controller to get the register address, and then apply the reset
> + operation.
> +
> +required:
> + - compatible
> + - "#reset-cells"
> + - mediatek,larb-rst
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + reset-controller {
> + compatible = "mediatek,mt8188-smi-reset";
> + #reset-cells = <1>;
> + mediatek,larb-rst = <&imgsys1_dip_top>;
I don't understand why would you be unable to add the SMI resets to the already
currently supported reset code in the clock-controller driver itself, like done
with literally all of the other clock controllers.
Please clarify.
Regards,
Angelo
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