linux-kernel - Re: [PATCH v3 15/15] PCI/AER: Enable internal errors for CXL upstream and downstream switch ports

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Message-ID: <Zz-0_RJGI0rbPHZx@wunner.de>
Date: Thu, 21 Nov 2024 23:32:29 +0100
From: Lukas Wunner <lukas@...ner.de>
To: "Bowman, Terry" <terry.bowman@....com>
Cc: linux-cxl@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-pci@...r.kernel.org, nifan.cxl@...il.com, ming4.li@...el.com,
	dave@...olabs.net, jonathan.cameron@...wei.com,
	dave.jiang@...el.com, alison.schofield@...el.com,
	vishal.l.verma@...el.com, dan.j.williams@...el.com,
	bhelgaas@...gle.com, mahesh@...ux.ibm.com, ira.weiny@...el.com,
	oohall@...il.com, Benjamin.Cheatham@....com, rrichter@....com,
	nathan.fontenot@....com, Smita.KoralahalliChannabasappa@....com
Subject: Re: [PATCH v3 15/15] PCI/AER: Enable internal errors for CXL
 upstream and downstream switch ports

On Thu, Nov 21, 2024 at 04:25:31PM -0600, Bowman, Terry wrote:
> On 11/18/2024 5:54 AM, Lukas Wunner wrote:
> > Hm, it seems the reason why you're moving pci_aer_unmask_internal_errors()
> > outside of "ifdef CONFIG_PCIEAER_CXL" is that drivers/cxl/core/pci.c
> > is conditional on CONFIG_CXL_BUS, whereas CONFIG_PCIEAER_CXL depends
> > on CONFIG_CXL_PCI.
> >
> > In other words, you need this to avoid build breakage if CONFIG_CXL_BUS
> > is enabled but CONFIG_CXL_PCI is not.
> >
> > I'm wondering (as a CXL ignoramus) why that can happen in the first
> > place, i.e. why is drivers/cxl/core/pci.c compiled at all if
> > CONFIG_CXL_PCI is disabled?
[...]
> The drivers/cxl/Makefile file shows CONFIG_CXL_PCI gates cxl_pci.c build with:
> obj-$(CONFIG_CXL_PCI) += cxl_pci.o

I wasn't referring to drivers/cxl/pci.c, but drivers/cxl/core/pci.c.
That's gated by CONFIG_CXL_BUS, not CONFIG_CXL_PCI, which seems weird.

Thanks,

Lukas