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Message-ID: <20241121113512.992747-1-naman.trivedimanojbhai@amd.com>
Date: Thu, 21 Nov 2024 03:35:12 -0800
From: Naman Trivedi <naman.trivedimanojbhai@....com>
To: <robh@...nel.org>, <michal.simek@....com>, <krzk+dt@...nel.org>,
<conor+dt@...nel.org>, <devicetree@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>, <senthilnathan.thangaraj@....com>
CC: <linux-kernel@...r.kernel.org>
Subject: [PATCH] arm64: zynqmp: add clock-output-names property in clock nodes
Add clock-output-names property to all clock nodes, so that the resulting
clock name do not change when clock node name is changed.
Signed-off-by: Naman Trivedi <naman.trivedimanojbhai@....com>
---
arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
index 60d1b1acf9a0..a231122002da 100644
--- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
+++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi
@@ -15,6 +15,7 @@ pss_ref_clk: pss_ref_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <33333333>;
+ clock-output-names = "pss_ref_clk";
};
video_clk: video_clk {
@@ -22,6 +23,7 @@ video_clk: video_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
+ clock-output-names = "video_clk";
};
pss_alt_ref_clk: pss_alt_ref_clk {
@@ -29,6 +31,7 @@ pss_alt_ref_clk: pss_alt_ref_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <0>;
+ clock-output-names = "pss_alt_ref_clk";
};
gt_crx_ref_clk: gt_crx_ref_clk {
@@ -36,6 +39,7 @@ gt_crx_ref_clk: gt_crx_ref_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <108000000>;
+ clock-output-names = "gt_crx_ref_clk";
};
aux_ref_clk: aux_ref_clk {
@@ -43,6 +47,7 @@ aux_ref_clk: aux_ref_clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
+ clock-output-names = "aux_ref_clk";
};
};
--
2.25.1
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