linux-kernel - Re: [PATCH v2 04/11] drm/msm: adreno: add GMU_BW

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Message-ID: <CAF6AEGtBVDERQjcoXriKK3d2VZy2QMUxZZJbFdSgbpvue=0QNA@mail.gmail.com>
Date: Thu, 21 Nov 2024 11:50:14 -0800
From: Rob Clark <robdclark@...il.com>
To: Neil Armstrong <neil.armstrong@...aro.org>
Cc: Akhil P Oommen <quic_akhilpo@...cinc.com>, Viresh Kumar <vireshk@...nel.org>, 
	Nishanth Menon <nm@...com>, Stephen Boyd <sboyd@...nel.org>, "Rafael J. Wysocki" <rafael@...nel.org>, 
	Sean Paul <sean@...rly.run>, Konrad Dybcio <konradybcio@...nel.org>, 
	Abhinav Kumar <quic_abhinavk@...cinc.com>, Dmitry Baryshkov <dmitry.baryshkov@...aro.org>, 
	Marijn Suijten <marijn.suijten@...ainline.org>, David Airlie <airlied@...il.com>, 
	Simona Vetter <simona@...ll.ch>, Bjorn Andersson <andersson@...nel.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	Connor Abbott <cwabbott0@...il.com>, linux-pm@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org, 
	dri-devel@...ts.freedesktop.org, freedreno@...ts.freedesktop.org, 
	devicetree@...r.kernel.org
Subject: Re: [PATCH v2 04/11] drm/msm: adreno: add GMU_BW_VOTE feature flag

On Tue, Nov 19, 2024 at 9:56 AM Neil Armstrong
<neil.armstrong@...aro.org> wrote:
>
> The Adreno GMU Management Unit (GNU) can also scale the DDR Bandwidth

nit, s/GNU/GMU/

> along the Frequency and Power Domain level, but by default we leave the
> OPP core vote for the interconnect ddr path.
>
> While scaling via the interconnect path was sufficient, newer GPUs
> like the A750 requires specific vote paremeters and bandwidth to
> achieve full functionality.
>
> While the feature will require some data in a6xx_info, it's safer
> to only enable tested platforms with this flag first.
>
> Add a new feature enabling DDR Bandwidth vote via GMU.
>
> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
> ---
>  drivers/gpu/drm/msm/adreno/adreno_gpu.h | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.h b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> index 4702d4cfca3b58fb3cbb25cb6805f1c19be2ebcb..394b96eb6c83354ae008b15b562bedb96cd391dd 100644
> --- a/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> +++ b/drivers/gpu/drm/msm/adreno/adreno_gpu.h
> @@ -58,6 +58,7 @@ enum adreno_family {
>  #define ADRENO_FEAT_HAS_HW_APRIV               BIT(0)
>  #define ADRENO_FEAT_HAS_CACHED_COHERENT                BIT(1)
>  #define ADRENO_FEAT_PREEMPTION                 BIT(2)
> +#define ADRENO_FEAT_GMU_BW_VOTE                        BIT(3)
>
>  /* Helper for formating the chip_id in the way that userspace tools like
>   * crashdec expect.
>
> --
> 2.34.1
>