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Message-ID: <20241122124505.1688436-4-quic_mmanikan@quicinc.com>
Date: Fri, 22 Nov 2024 18:15:04 +0530
From: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
To: <andersson@...nel.org>, <linus.walleij@...aro.org>, <robh@...nel.org>,
<krzk+dt@...nel.org>, <conor+dt@...nel.org>, <konradybcio@...nel.org>,
<linux-arm-msm@...r.kernel.org>, <linux-gpio@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>
CC: <quic_srichara@...cinc.com>, <quic_varada@...cinc.com>
Subject: [PATCH 3/4] arm64: dts: qcom: ipq5424: add spi0 node
Add SPI0 node for IPQ5424 SoC.
Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@...cinc.com>
---
arch/arm64/boot/dts/qcom/ipq5424.dtsi | 11 +++++++++++
1 file changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/ipq5424.dtsi b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
index 5e219f900412..b4d736cd8610 100644
--- a/arch/arm64/boot/dts/qcom/ipq5424.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq5424.dtsi
@@ -201,6 +201,17 @@ uart1: serial@...4000 {
clock-names = "se";
interrupts = <GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH>;
};
+
+ spi0: spi@...0000 {
+ compatible = "qcom,geni-spi";
+ reg = <0 0x01a90000 0 0x4000>;
+ clocks = <&gcc GCC_QUPV3_SPI0_CLK>;
+ clock-names = "se";
+ interrupts = <GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
sdhc: mmc@...4000 {
--
2.34.1
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